tmp_m88k_bcnd.cc Source File

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tmp_m88k_bcnd.cc
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1 
2 /* AUTOMATICALLY GENERATED! Do not edit. */
3 
4 
5 X(bcnd_gt0)
6 {
7  if ((int32_t)reg(ic->arg[0]) > 0) {
8  cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
10  }
11 }
12 
13 
14 X(bcnd_eq0)
15 {
16  if ((int32_t)reg(ic->arg[0]) == 0) {
17  cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
19  }
20 }
21 
22 
23 X(bcnd_ge0)
24 {
25  if ((int32_t)reg(ic->arg[0]) >= 0) {
26  cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
28  }
29 }
30 
31 
32 X(bcnd_not_maxneg)
33 {
34  if ((uint32_t)reg(ic->arg[0]) != 0x80000000UL) {
35  cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
37  }
38 }
39 
40 
41 X(bcnd_maxneg)
42 {
43  if ((uint32_t)reg(ic->arg[0]) == 0x80000000UL) {
44  cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
46  }
47 }
48 
49 
50 X(bcnd_lt0)
51 {
52  if ((int32_t)reg(ic->arg[0]) < 0) {
53  cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
55  }
56 }
57 
58 
59 X(bcnd_ne0)
60 {
61  if ((int32_t)reg(ic->arg[0]) != 0) {
62  cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
64  }
65 }
66 
67 
68 X(bcnd_le0)
69 {
70  if ((int32_t)reg(ic->arg[0]) <= 0) {
71  cpu->pc = (cpu->pc & 0xfffff000) + (int32_t)ic->arg[2];
73  }
74 }
75 
76 
77 X(bcnd_n_gt0)
78 {
79  int cond = (int32_t)reg(ic->arg[0]) > 0;
80  SYNCH_PC;
81  if (cond)
84  + ic->arg[2];
85  else
86  cpu->cd.m88k.delay_target = cpu->pc + 8;
88  ic[1].f(cpu, ic+1);
92  if (cond) {
95  } else
96  cpu->cd.m88k.next_ic ++;
97  } else
99 }
100 
101 
102 X(bcnd_n_eq0)
103 {
104  int cond = (int32_t)reg(ic->arg[0]) == 0;
105  SYNCH_PC;
106  if (cond)
109  + ic->arg[2];
110  else
111  cpu->cd.m88k.delay_target = cpu->pc + 8;
113  ic[1].f(cpu, ic+1);
117  if (cond) {
120  } else
121  cpu->cd.m88k.next_ic ++;
122  } else
124 }
125 
126 
127 X(bcnd_n_ge0)
128 {
129  int cond = (int32_t)reg(ic->arg[0]) >= 0;
130  SYNCH_PC;
131  if (cond)
134  + ic->arg[2];
135  else
136  cpu->cd.m88k.delay_target = cpu->pc + 8;
138  ic[1].f(cpu, ic+1);
142  if (cond) {
145  } else
146  cpu->cd.m88k.next_ic ++;
147  } else
149 }
150 
151 
152 X(bcnd_n_not_maxneg)
153 {
154  int cond = (uint32_t)reg(ic->arg[0]) != 0x80000000UL;
155  SYNCH_PC;
156  if (cond)
159  + ic->arg[2];
160  else
161  cpu->cd.m88k.delay_target = cpu->pc + 8;
163  ic[1].f(cpu, ic+1);
167  if (cond) {
170  } else
171  cpu->cd.m88k.next_ic ++;
172  } else
174 }
175 
176 
177 X(bcnd_n_maxneg)
178 {
179  int cond = (uint32_t)reg(ic->arg[0]) == 0x80000000UL;
180  SYNCH_PC;
181  if (cond)
184  + ic->arg[2];
185  else
186  cpu->cd.m88k.delay_target = cpu->pc + 8;
188  ic[1].f(cpu, ic+1);
192  if (cond) {
195  } else
196  cpu->cd.m88k.next_ic ++;
197  } else
199 }
200 
201 
202 X(bcnd_n_lt0)
203 {
204  int cond = (int32_t)reg(ic->arg[0]) < 0;
205  SYNCH_PC;
206  if (cond)
209  + ic->arg[2];
210  else
211  cpu->cd.m88k.delay_target = cpu->pc + 8;
213  ic[1].f(cpu, ic+1);
217  if (cond) {
220  } else
221  cpu->cd.m88k.next_ic ++;
222  } else
224 }
225 
226 
227 X(bcnd_n_ne0)
228 {
229  int cond = (int32_t)reg(ic->arg[0]) != 0;
230  SYNCH_PC;
231  if (cond)
234  + ic->arg[2];
235  else
236  cpu->cd.m88k.delay_target = cpu->pc + 8;
238  ic[1].f(cpu, ic+1);
242  if (cond) {
245  } else
246  cpu->cd.m88k.next_ic ++;
247  } else
249 }
250 
251 
252 X(bcnd_n_le0)
253 {
254  int cond = (int32_t)reg(ic->arg[0]) <= 0;
255  SYNCH_PC;
256  if (cond)
259  + ic->arg[2];
260  else
261  cpu->cd.m88k.delay_target = cpu->pc + 8;
263  ic[1].f(cpu, ic+1);
267  if (cond) {
270  } else
271  cpu->cd.m88k.next_ic ++;
272  } else
274 }
275 
276 
277 X(bcnd_samepage_gt0)
278 {
279  if ((int32_t)reg(ic->arg[0]) > 0) {
280  cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
281  }
282 }
283 
284 
285 X(bcnd_samepage_eq0)
286 {
287  if ((int32_t)reg(ic->arg[0]) == 0) {
288  cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
289  }
290 }
291 
292 
293 X(bcnd_samepage_ge0)
294 {
295  if ((int32_t)reg(ic->arg[0]) >= 0) {
296  cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
297  }
298 }
299 
300 
301 X(bcnd_samepage_not_maxneg)
302 {
303  if ((uint32_t)reg(ic->arg[0]) != 0x80000000UL) {
304  cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
305  }
306 }
307 
308 
309 X(bcnd_samepage_maxneg)
310 {
311  if ((uint32_t)reg(ic->arg[0]) == 0x80000000UL) {
312  cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
313  }
314 }
315 
316 
317 X(bcnd_samepage_lt0)
318 {
319  if ((int32_t)reg(ic->arg[0]) < 0) {
320  cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
321  }
322 }
323 
324 
325 X(bcnd_samepage_ne0)
326 {
327  if ((int32_t)reg(ic->arg[0]) != 0) {
328  cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
329  }
330 }
331 
332 
333 X(bcnd_samepage_le0)
334 {
335  if ((int32_t)reg(ic->arg[0]) <= 0) {
336  cpu->cd.m88k.next_ic = (struct m88k_instr_call *) ic->arg[2];
337  }
338 }
339 
340 
341 
342 void (*m88k_bcnd[32 * 2 * 2])(struct cpu *, struct m88k_instr_call *) = {
343 NULL,
344 m88k_instr_bcnd_gt0,
345 m88k_instr_bcnd_eq0,
346 m88k_instr_bcnd_ge0,
347 NULL,
348 NULL,
349 NULL,
350 m88k_instr_bcnd_not_maxneg,
351 m88k_instr_bcnd_maxneg,
352 NULL,
353 NULL,
354 NULL,
355 m88k_instr_bcnd_lt0,
356 m88k_instr_bcnd_ne0,
357 m88k_instr_bcnd_le0,
358 NULL,
359 NULL,
360 NULL,
361 NULL,
362 NULL,
363 NULL,
364 NULL,
365 NULL,
366 NULL,
367 NULL,
368 NULL,
369 NULL,
370 NULL,
371 NULL,
372 NULL,
373 NULL,
374 NULL,
375 NULL,
376 m88k_instr_bcnd_n_gt0,
377 m88k_instr_bcnd_n_eq0,
378 m88k_instr_bcnd_n_ge0,
379 NULL,
380 NULL,
381 NULL,
382 m88k_instr_bcnd_n_not_maxneg,
383 m88k_instr_bcnd_n_maxneg,
384 NULL,
385 NULL,
386 NULL,
387 m88k_instr_bcnd_n_lt0,
388 m88k_instr_bcnd_n_ne0,
389 m88k_instr_bcnd_n_le0,
390 NULL,
391 NULL,
392 NULL,
393 NULL,
394 NULL,
395 NULL,
396 NULL,
397 NULL,
398 NULL,
399 NULL,
400 NULL,
401 NULL,
402 NULL,
403 NULL,
404 NULL,
405 NULL,
406 NULL,
407 NULL,
408 m88k_instr_bcnd_samepage_gt0,
409 m88k_instr_bcnd_samepage_eq0,
410 m88k_instr_bcnd_samepage_ge0,
411 NULL,
412 NULL,
413 NULL,
414 m88k_instr_bcnd_samepage_not_maxneg,
415 m88k_instr_bcnd_samepage_maxneg,
416 NULL,
417 NULL,
418 NULL,
419 m88k_instr_bcnd_samepage_lt0,
420 m88k_instr_bcnd_samepage_ne0,
421 m88k_instr_bcnd_samepage_le0,
422 NULL,
423 NULL,
424 NULL,
425 NULL,
426 NULL,
427 NULL,
428 NULL,
429 NULL,
430 NULL,
431 NULL,
432 NULL,
433 NULL,
434 NULL,
435 NULL,
436 NULL,
437 NULL,
438 NULL,
439 NULL,
440 NULL,
441 NULL,
442 NULL,
443 NULL,
444 NULL,
445 NULL,
446 NULL,
447 NULL,
448 NULL,
449 NULL,
450 NULL,
451 NULL,
452 NULL,
453 NULL,
454 NULL,
455 NULL,
456 NULL,
457 NULL,
458 NULL,
459 NULL,
460 NULL,
461 NULL,
462 NULL,
463 NULL,
464 NULL,
465 NULL,
466 NULL,
467 NULL,
468 NULL,
469 NULL,
470 NULL };
NOT_DELAYED
#define NOT_DELAYED
Definition: cpu.h:305
cpu::n_translated_instrs
int n_translated_instrs
Definition: cpu.h:430
m88k_bcnd
void(* m88k_bcnd[32 *2 *2])(struct cpu *, struct m88k_instr_call *)
Definition: tmp_m88k_bcnd.cc:342
cpu::m88k
struct m88k_cpu m88k
Definition: cpu.h:445
X
X(bcnd_gt0)
Definition: tmp_m88k_bcnd.cc:5
cpu::cd
union cpu::@1 cd
ic
struct arm_instr_call * ic
Definition: tmp_arm_multi.cc:50
M88K_IC_ENTRIES_PER_PAGE
#define M88K_IC_ENTRIES_PER_PAGE
Definition: M88K_CPUComponent.h:261
SYNCH_PC
#define SYNCH_PC
Definition: cpu_m88k_instr.cc:37
M88K_INSTR_ALIGNMENT_SHIFT
#define M88K_INSTR_ALIGNMENT_SHIFT
Definition: M88K_CPUComponent.h:260
TO_BE_DELAYED
#define TO_BE_DELAYED
Definition: cpu.h:307
cond
char * cond[16]
Definition: generate_arm_dpi.c:30
cpu::delay_slot
uint8_t delay_slot
Definition: cpu.h:356
reg
#define reg(x)
Definition: tmp_alpha_tail.cc:53
m88k_cpu::delay_target
uint32_t delay_target
Definition: cpu_m88k.h:258
quick_pc_to_pointers
#define quick_pc_to_pointers(cpu)
Definition: quick_pc_to_pointers.h:29
cpu
Definition: cpu.h:326
EXCEPTION_IN_DELAY_SLOT
#define EXCEPTION_IN_DELAY_SLOT
Definition: cpu.h:308
cpu::pc
uint64_t pc
Definition: cpu.h:386

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