cpu_ppc.cc Source File
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52 #define DYNTRANS_DUALMODE_32
72 int cpu_id,
char *cpu_type_name)
81 while (i >= 0 && cpu_type_defs[i].
name != NULL) {
82 if (strcasecmp(cpu_type_defs[i].
name, cpu_type_name) == 0) {
152 debug(
" (I+D = %i+%i KB",
156 debug(
", L2 = %i KB",
207 snprintf(tmpstr,
sizeof(tmpstr),
"r%i", i);
212 snprintf(tmpstr,
sizeof(tmpstr),
"f%i", i);
215 for (i=0; i<16; i++) {
217 snprintf(tmpstr,
sizeof(tmpstr),
"sr%i", i);
226 memset(&templ, 0,
sizeof(templ));
250 while (tdefs[i].
name != NULL) {
255 if ((i % 6) == 0 || tdefs[i].
name == NULL)
278 debug(
"_INTERNAL ERROR_");
281 debug(
", I+D = %i+%i KB",
287 debug(
", L2 = %i %cB",
288 kb >= 1024? kb / 1024 : kb,
289 kb >= 1024?
'M' :
'K');
300 int check_for_interrupts)
304 if (valuep == NULL) {
305 fatal(
"reg_access_msr(): NULL\n");
323 fatal(
"\n[ Reboot hack for NetBSD/prep. TODO: "
357 if (exception_nr >= 0x10 && exception_nr <= 0x13)
364 fatal(
"[ PPC Exception 0x%x; pc=0x%" PRIx64
" ]\n",
365 exception_nr,
cpu->
pc);
371 cpu->
pc = exception_nr * 0x100;
373 cpu->
pc += 0xfff00000ULL;
393 uint64_t offset, tmp;
402 debug(
"cpu%i: pc = 0x", x);
409 debug(
"cpu%i: lr = 0x", x);
419 debug(
"\ncpu%i: ", x);
420 debug(
"ctr = 0x", x);
426 debug(
" xer = 0x", x);
439 debug(
" r%02i = 0x%08" PRIx32
" ", i,
447 int r = (i >> 1) + ((i & 1) << 4);
450 debug(
" r%02i = 0x%016" PRIx64
" ", r,
459 debug(
"cpu%i: srr0 = 0x%08" PRIx32
460 " srr1 = 0x%08" PRIx32
"\n", x,
464 debug(
"cpu%i: srr0 = 0x%016" PRIx64
465 " srr1 = 0x%016" PRIx64
"\n", x,
470 debug(
"cpu%i: msr = ", x);
473 debug(
"0x%08" PRIx32, (uint32_t) tmp);
475 debug(
"0x%016" PRIx64, (uint64_t) tmp);
477 debug(
" tb = 0x%08" PRIx32
"%08" PRIx32
"\n",
481 debug(
"cpu%i: dec = 0x%08" PRIx32,
484 debug(
" hdec = 0x%08" PRIx32
"\n",
491 debug(
"cpu%i: fpscr = 0x%08" PRIx32
"\n",
501 debug(
" f%02i = 0x%016" PRIx64
" ", i,
509 debug(
"cpu%i: sdr1 = 0x%" PRIx64
"\n", x,
512 debug(
"cpu%i: PPC601-style, TODO!\n");
514 for (i=0; i<8; i++) {
518 uint32_t len = (((upper &
BAT_BL) << 15)
520 debug(
"cpu%i: %sbat%i: u=0x%08" PRIx32
521 " l=0x%08" PRIx32
" ",
522 x, i<4?
"i" :
"d", i&3, upper, lower);
523 if (!(upper &
BAT_V)) {
524 debug(
" (not valid)\n");
528 debug(
" (%i KB, ", len >> 10);
530 debug(
" (%i MB, ", len >> 20);
534 debug(
"supervisor, ");
537 lower &
BAT_W?
"W" :
"",
538 lower &
BAT_I?
"I" :
"",
539 lower &
BAT_M?
"M" :
"",
540 lower &
BAT_G?
"G" :
"");
554 for (i=0; i<16; i++) {
558 debug(
" sr%-2i = 0x%08" PRIx32, i, s);
564 debug(
"NON-memory type");
570 debug(
"supervisor-key");
634 int running, uint64_t dumpaddr)
636 int hi6, xo, lev, rt, rs, ra, rb, imm,
sh, me, rc, l_bit;
637 int spr, aa_bit, lk_bit, bf, bh, bi, bo, mb, nb, bt, ba, bb, fpreg;
638 int bfa, to,
load, wlen, no_rb = 0;
639 uint64_t offset,
addr;
641 const char *
symbol, *mnem =
"ERROR";
649 if (
symbol != NULL && offset==0)
656 debug(
"%08" PRIx32, (uint32_t) dumpaddr);
658 debug(
"%016" PRIx64, (uint64_t) dumpaddr);
664 debug(
": %08" PRIx32
"\t", iword);
674 debug(
"ALTIVEC TODO");
679 rt = (iword >> 21) & 31;
680 ra = (iword >> 16) & 31;
681 imm = (int16_t)(iword & 0xffff);
684 mnem = power?
"muli":
"mulli";
687 mnem = power?
"sfi":
"subfic";
690 debug(
"%s\tr%i,r%i,%i", mnem, rt, ra, imm);
694 bf = (iword >> 23) & 7;
695 l_bit = (iword >> 21) & 1;
696 ra = (iword >> 16) & 31;
698 imm = iword & 0xffff;
701 imm = (int16_t)(iword & 0xffff);
704 debug(
"%s%si\t", mnem, l_bit?
"d" :
"w");
707 debug(
"r%i,%i", ra, imm);
711 rt = (iword >> 21) & 31;
712 ra = (iword >> 16) & 31;
714 imm = (int16_t)(iword & 0xffff);
715 mnem = power?
"ai":
"addic";
716 if (imm < 0 && !power) {
720 debug(
"%s%s\tr%i,r%i,%i", mnem, rc?
".":
"", rt, ra, imm);
723 rt = (iword >> 21) & 31;
724 ra = (iword >> 16) & 31;
725 imm = (int16_t)(iword & 0xffff);
727 debug(
"li\tr%i,%i", rt, imm);
729 mnem = power?
"cal":
"addi";
730 if (imm < 0 && !power) {
734 debug(
"%s\tr%i,r%i,%i", mnem, rt, ra, imm);
738 rt = (iword >> 21) & 31;
739 ra = (iword >> 16) & 31;
740 imm = (int16_t)(iword & 0xffff);
742 debug(
"lis\tr%i,%i", rt, imm);
744 debug(
"%s\tr%i,r%i,%i",
745 power?
"cau":
"addis", rt, ra, imm);
748 aa_bit = (iword & 2) >> 1;
750 bo = (iword >> 21) & 31;
751 bi = (iword >> 16) & 31;
753 addr = (int64_t)(int16_t)(iword & 0xfffc);
761 debug(
"\t%i,%i,", bo, bi);
774 lev = (iword >> 5) & 0x7f;
779 debug(
" (WARNING! reserved value)");
783 aa_bit = (iword & 2) >> 1;
786 addr = (int64_t)(int32_t)((iword & 0x03fffffc) << 6);
807 xo = (iword >> 1) & 1023;
810 bf = (iword >> 23) & 7;
811 bfa = (iword >> 18) & 7;
812 debug(
"mcrf\tcr%i,cr%i", bf, bfa);
821 debug(
"rfsvc%s", power?
"":
"\t(INVALID for PowerPC)");
825 bo = (iword >> 21) & 31;
826 bi = (iword >> 16) & 31;
827 bh = (iword >> 11) & 3;
831 mnem = power?
"bcr" :
"bclr";
break;
833 mnem = power?
"bcc" :
"bcctr";
break;
835 debug(
"%s%s%s\t%i,%i,%i", mnem, lk_bit?
"l" :
"",
836 bh? (bh==3?
"+" : (bh==2?
"-" :
"?")) :
"",
840 debug(
"%s", power?
"ics" :
"isync");
850 bt = (iword >> 21) & 31;
851 ba = (iword >> 16) & 31;
852 bb = (iword >> 11) & 31;
863 debug(
"%s\t%i,%i,%i", mnem, bt, ba, bb);
866 debug(
"unimplemented hi6_19, xo = 0x%x", xo);
872 rs = (iword >> 21) & 31;
873 ra = (iword >> 16) & 31;
874 sh = (iword >> 11) & 31;
875 mb = (iword >> 6) & 31;
876 me = (iword >> 1) & 31;
880 mnem = power?
"rlnm" :
"rlwnm";
break;
882 mnem = power?
"rlimi" :
"rlwimi";
break;
884 mnem = power?
"rlinm" :
"rlwinm";
break;
886 debug(
"%s%s\tr%i,r%i,%s%i,%i,%i",
887 mnem, rc?
".":
"", ra, rs,
897 rs = (iword >> 21) & 31;
898 ra = (iword >> 16) & 31;
899 imm = iword & 0xffff;
902 mnem = power?
"oril":
"ori";
905 mnem = power?
"oriu":
"oris";
908 mnem = power?
"xoril":
"xori";
911 mnem = power?
"xoriu":
"xoris";
914 mnem = power?
"andil.":
"andi.";
917 mnem = power?
"andiu.":
"andis.";
920 if (hi6 ==
PPC_HI6_ORI && rs == 0 && ra == 0 && imm == 0)
923 debug(
"%s\tr%i,r%i,0x%04x", mnem, ra, rs, imm);
926 xo = (iword >> 2) & 7;
937 rs = (iword >> 21) & 31;
938 ra = (iword >> 16) & 31;
939 sh = ((iword >> 11) & 31) | ((iword & 2) << 4);
940 me = ((iword >> 6) & 31) | (iword & 0x20);
942 debug(
"%s%s\tr%i,r%i,%i,%i",
943 mnem, rc?
".":
"", ra, rs,
sh, me);
946 debug(
"unimplemented hi6_30, xo = 0x%x", xo);
950 xo = (iword >> 1) & 1023;
955 bf = (iword >> 23) & 7;
956 l_bit = (iword >> 21) & 1;
957 ra = (iword >> 16) & 31;
958 rb = (iword >> 11) & 31;
963 debug(
"%s%s\t", mnem, l_bit?
"d" :
"w");
966 debug(
"r%i,r%i", ra, rb);
969 rt = (iword >> 21) & 31;
970 debug(
"mfcr\tr%i", rt);
973 rt = (iword >> 21) & 31;
974 debug(
"mfmsr\tr%i", rt);
977 rs = (iword >> 21) & 31;
978 mb = (iword >> 12) & 255;
979 debug(
"mtcrf\t%i,r%i", mb, rs);
982 rs = (iword >> 21) & 31;
983 l_bit = (iword >> 16) & 1;
984 debug(
"mtmsr\tr%i", rs);
990 to = (iword >> 21) & 31;
991 ra = (iword >> 16) & 31;
992 rb = (iword >> 11) & 31;
994 case PPC_31_TW: mnem = power?
"t" :
"tw";
break;
997 debug(
"%s\t%i,r%i,r%i", mnem, to, ra, rb);
1028 load = 0; wlen = 0; fpreg = 0;
1029 rs = (iword >> 21) & 31;
1030 ra = (iword >> 16) & 31;
1031 rb = (iword >> 11) & 31;
1042 mnem = power?
"lx" :
"lwzx";
1045 mnem = power?
"lux":
"lwzux";
1048 mnem =
"lfdx";
break;
1050 mnem =
"lfsx";
break;
1058 wlen = 4; mnem = power?
"stx" :
"stwx";
1061 wlen = 4; mnem = power?
"stux" :
"stwux";
1067 "lbrx" :
"lwbrx";
break;
1070 "stbrx" :
"stwbrx";
break;
1072 mnem =
"stfdx";
break;
1074 mnem =
"stfsx";
break;
1076 debug(
"%s\t%s%i,r%i,r%i", mnem,
1077 fpreg?
"f" :
"r", rs, ra, rb);
1089 debug(
" \t<0x%" PRIx64, (uint64_t)
addr);
1090 if (wlen > 0 && !fpreg ) {
1097 rt = (iword >> 21) & 31;
1098 ra = (iword >> 16) & 31;
1105 debug(
"%s%s\tr%i,r%i", mnem, rc?
"." :
"", rt, ra);
1108 debug(
"wrteei\t%i", iword & 0x8000? 1 : 0);
1112 rs = (iword >> 21) & 31;
1113 l_bit = (iword >> 16) & 1;
1114 debug(
"mtmsrd\tr%i", rs);
1116 debug(
",%i", l_bit);
1120 rt = (iword >> 21) & 31;
1121 ra = (iword >> 16) & 31;
1126 mnem = power?
"aze" :
"addze";
1129 mnem = power?
"azeo" :
"addzeo";
1132 debug(
"%s%s\tr%i,r%i", mnem, rc?
"." :
"", rt, ra);
1137 rt = (iword >> 21) & 31;
1138 ra = (iword >> 16) & 15;
1143 debug(
"%s\tr%i,%i", mnem, rt, ra);
1148 rt = (iword >> 21) & 31;
1149 rb = (iword >> 11) & 31;
1154 debug(
"%s\tr%i,r%i", mnem, rt, rb);
1178 rt = (iword >> 21) & 31;
1179 ra = (iword >> 16) & 31;
1180 rb = (iword >> 11) & 31;
1185 mnem = power?
"a" :
"addc";
1188 mnem = power?
"ao" :
"addco";
1191 mnem = power?
"ae" :
"adde";
1194 mnem = power?
"aeo" :
"addeo";
1197 mnem = power?
"ame" :
"addme";
1201 mnem = power?
"ameo" :
"addmeo";
1205 mnem = power?
"cax" :
"add";
1208 mnem = power?
"caxo" :
"addo";
1213 mnem = power?
"muls" :
"mullw";
1216 mnem = power?
"mulso" :
"mullwo";
1221 mnem = power?
"sf" :
"subfc";
break;
1223 mnem = power?
"sfo" :
"subfco";
break;
1225 mnem = power?
"sfe" :
"subfe";
break;
1227 mnem = power?
"sfeo" :
"subfeo";
break;
1229 mnem = power?
"sfme" :
"subfme";
break;
1231 mnem = power?
"sfmeo" :
"subfmeo";
break;
1233 mnem = power?
"sfze" :
"subfze";
1237 mnem = power?
"sfzeo" :
"subfzeo";
1241 debug(
"%s%s\tr%i,r%i", mnem, rc?
"." :
"", rt, ra);
1246 rt = (iword >> 21) & 31;
1247 spr = ((iword >> 6) & 0x3e0) + ((iword >> 16) & 31);
1250 case 8:
debug(
"mflr\tr%i", rt);
break;
1251 case 9:
debug(
"mfctr\tr%i", rt);
break;
1252 default:
debug(
"mfspr\tr%i,spr%i", rt, spr);
1254 if (spr == 8 || spr == 9)
1257 ppc_spr_names[spr]==NULL?
"?" : ppc_spr_names[spr]);
1260 debug(
": 0x%" PRIx32, (uint32_t)
1263 debug(
": 0x%" PRIx64, (uint64_t)
1276 rb = (iword >> 11) & 31;
1282 rb = (iword >> 11) & 31;
1284 debug(
"tlbi\tr%i,r%i", ra, rb);
1286 debug(
"tlbie\tr%i", rb);
1289 rs = (iword >> 21) & 31;
1290 ra = (iword >> 16) & 31;
1291 rb = (iword >> 11) & 31;
1292 debug(
"tlbsx.\tr%i,r%i,r%i", rs, ra, rb);
1298 rt = (iword >> 21) & 31;
1299 spr = ((iword >> 6) & 0x3e0) + ((iword >> 16) & 31);
1300 debug(
"mftb%s\tr%i", spr==268?
"" :
1301 (spr==269?
"u" :
"?"), rt);
1304 rs = (iword >> 21) & 31;
1305 ra = (iword >> 16) & 31;
1307 mnem = power?
"cntlz" :
"cntlzw";
1308 debug(
"%s%s\tr%i,r%i", mnem, rc?
"." :
"", ra, rs);
1320 ra = (iword >> 16) & 31;
1321 rb = (iword >> 11) & 31;
1333 "dclz" :
"dcbz";
break;
1335 debug(
"%s\tr%i,r%i", mnem, ra, rb);
1349 rs = (iword >> 21) & 31;
1350 ra = (iword >> 16) & 31;
1351 rb = (iword >> 11) & 31;
1354 debug(
"mr%s\tr%i,r%i", rc?
"." :
"", ra, rs);
1358 power?
"sl" :
"slw";
break;
1361 power?
"sra" :
"sraw";
break;
1363 power?
"sr" :
"srw";
break;
1373 debug(
"%s%s\tr%i,r%i,r%i", mnem,
1374 rc?
"." :
"", ra, rs, rb);
1378 ra = (iword >> 16) & 31;
1379 rb = (iword >> 11) & 31;
1380 debug(
"dccci\tr%i,r%i", ra, rb);
1383 ra = (iword >> 16) & 31;
1384 rb = (iword >> 11) & 31;
1385 debug(
"iccci\tr%i,r%i", ra, rb);
1391 rt = (iword >> 21) & 31;
1392 ra = (iword >> 16) & 31;
1393 rb = (iword >> 11) & 31;
1402 debug(
"%s%s\tr%i,r%i,r%i", mnem, rc?
"." :
"",
1406 rs = (iword >> 21) & 31;
1407 spr = ((iword >> 6) & 0x3e0) + ((iword >> 16) & 31);
1410 case 8:
debug(
"mtlr\tr%i", rs);
break;
1411 case 9:
debug(
"mtctr\tr%i", rs);
break;
1412 default:
debug(
"mtspr\tspr%i,r%i", spr, rs);
1414 if (spr == 8 || spr == 9)
1417 ppc_spr_names[spr]==NULL?
"?" : ppc_spr_names[spr]);
1420 debug(
": 0x%" PRIx32, (uint32_t)
1423 debug(
": 0x%" PRIx64, (uint64_t)
1429 debug(
"%s", power?
"dcs" :
"sync");
1433 rs = (iword >> 21) & 31;
1434 ra = (iword >> 16) & 31;
1435 nb = (iword >> 11) & 31;
1438 mnem = power?
"lsi" :
"lswi";
break;
1440 mnem = power?
"stsi" :
"stswi";
break;
1442 debug(
"%s\tr%i,r%i,%i", mnem, rs, ra, nb);
1445 rs = (iword >> 21) & 31;
1446 ra = (iword >> 16) & 31;
1447 sh = (iword >> 11) & 31;
1449 mnem = power?
"srai" :
"srawi";
1450 debug(
"%s%s\tr%i,r%i,%i", mnem,
1451 rc?
"." :
"", ra, rs,
sh);
1457 debug(
"%s", power?
"eieio?" :
"eieio");
1462 rs = (iword >> 21) & 31;
1463 ra = (iword >> 16) & 31;
1467 mnem = power?
"exts" :
"extsb";
1476 debug(
"%s%s\tr%i,r%i", mnem, rc?
"." :
"", ra, rs);
1482 rs = (iword >> 21) & 31;
1483 ra = (iword >> 16) & 31;
1484 rb = (iword >> 11) & 31;
1492 debug(
"%s%s\tv%i,r%i,r%i", mnem, rc?
"." :
"",
1496 debug(
"unimplemented hi6_31, xo = 0x%x", xo);
1524 rs = (iword >> 21) & 31;
1525 ra = (iword >> 16) & 31;
1526 imm = (int16_t)(iword & 0xffff);
1531 mnem = power?
"l" :
"lwz";
break;
1533 mnem = power?
"lu" :
"lwzu";
break;
1535 mnem =
"lhz";
break;
1537 mnem =
"lhzu";
break;
1539 mnem =
"lha";
break;
1541 mnem =
"lhau";
break;
1543 mnem =
"lbz";
break;
1545 mnem =
"lbzu";
break;
1549 case PPC_HI6_STW: wlen=4; mnem = power?
"st" :
"stw";
break;
1550 case PPC_HI6_STWU: wlen=4; mnem = power?
"stu" :
"stwu";
break;
1556 case PPC_HI6_STMW: mnem = power?
"stm" :
"stmw";
break;
1557 case PPC_HI6_STFD: fpreg=1; wlen=8; mnem =
"stfd";
break;
1558 case PPC_HI6_STFS: fpreg=1; wlen=4; mnem =
"stfs";
break;
1560 debug(
"%s\t", mnem);
1565 debug(
"%i,%i(r%i)", rs, imm, ra);
1576 debug(
" \t<0x%" PRIx64, (uint64_t)
addr);
1577 if (wlen > 0 &&
load && wlen > 0) {
1578 unsigned char tw[8];
1584 for (i=0; i<wlen; i++) {
1586 tdata |= tw[wlen-1-i];
1589 for (i=0; i<wlen; i++) {
1605 debug(
"0x%" PRIx64, (uint64_t) tdata);
1608 debug(
": unreadable");
1610 if (wlen > 0 && !
load && wlen > 0) {
1613 for (i=0; i<wlen; i++)
1615 ((uint64_t)0xff << (i*8)));
1623 debug(
"0x%" PRIx64, (uint64_t) tdata);
1625 if (tdata > -256 && tdata < 256)
1626 debug(
"%i", (
int)tdata);
1628 debug(
"0x%" PRIx64, (uint64_t) tdata);
1634 xo = (iword >> 1) & 1023;
1643 rt = (iword >> 21) & 31;
1644 ra = (iword >> 16) & 31;
1645 rb = (iword >> 11) & 31;
1646 rs = (iword >> 6) & 31;
1655 debug(
"%s%s\t", mnem, rc?
"." :
"");
1658 debug(
"f%i,f%i,f%i", rt, ra, rs);
1661 debug(
"f%i,f%i,f%i,f%i", rt, ra, rs, rb);
1663 default:
debug(
"f%i,f%i,f%i", rt, ra, rb);
1667 debug(
"unimplemented hi6_59, xo = 0x%x", xo);
1671 xo = (iword >> 1) & 1023;
1681 rt = (iword >> 21) & 31;
1682 ra = (iword >> 16) & 31;
1683 rb = (iword >> 11) & 31;
1684 rs = (iword >> 6) & 31;
1688 mnem = power?
"fd" :
"fdiv";
break;
1690 mnem = power?
"fs" :
"fsub";
break;
1692 mnem = power?
"fa" :
"fadd";
break;
1694 mnem = power?
"fm" :
"fmul";
break;
1696 mnem = power?
"fms" :
"fmsub";
break;
1698 mnem = power?
"fma" :
"fmadd";
break;
1700 debug(
"%s%s\t", mnem, rc?
"." :
"");
1703 debug(
"f%i,f%i,f%i", rt, ra, rs);
1706 debug(
"f%i,f%i,f%i,f%i", rt, ra, rs, rb);
1708 default:
debug(
"f%i,f%i,f%i", rt, ra, rb);
1711 default:rt = (iword >> 21) & 31;
1712 ra = (iword >> 16) & 31;
1713 rb = (iword >> 11) & 31;
1726 mnem = power?
"fcirz" :
"fctiwz";
break;
1733 debug(
"%s%s\t", mnem, rc?
"." :
"");
1736 debug(
"%i,f%i,f%i", rt >> 2, ra, rb);
1744 debug(
"f%i,f%i", rt, rb);
1746 default:
debug(
"f%i,f%i,f%i", rt, ra, rb);
1750 debug(
"mffs%s\tf%i", rc?
".":
"", rt);
1753 ra = (iword >> 17) & 255;
1754 debug(
"mtfsf%s\t0x%02x,f%i", rc?
".":
"", ra, rb);
1756 default:
debug(
"unimplemented hi6_63, xo = 0x%x", xo);
1762 debug(
"unimplemented hi6 = 0x%02x", hi6);
1766 return sizeof(iword);
1777 static void debug_spr_usage(uint64_t
pc,
int spr)
1779 static uint32_t spr_used[1024 /
sizeof(uint32_t)];
1780 static int initialized = 0;
1783 memset(spr_used, 0,
sizeof(spr_used));
1788 if (spr_used[spr >> 2] & (1 << (spr & 3)))
1819 fatal(
"[ using UNIMPLEMENTED spr %i (%s), pc = "
1820 "0x%" PRIx64
" ]\n", spr, ppc_spr_names[spr] == NULL?
1821 "UNKNOWN" : ppc_spr_names[spr], (uint64_t)
pc);
1824 spr_used[spr >> 2] |= (1 << (spr & 3));
1838 if ((int64_t)value < 0)
1840 else if ((int64_t)value > 0)
1845 if ((int32_t)value < 0)
1847 else if ((int32_t)value > 0)
int ppc_cpu_new(struct cpu *cpu, struct memory *mem, struct machine *machine, int cpu_id, char *cpu_type_name)
void(* interrupt_deassert)(struct interrupt *)
struct symbol_context symbol_context
#define CPU_SETTINGS_ADD_REGISTER32(name, var)
char * get_symbol_name(struct symbol_context *, uint64_t addr, uint64_t *offset)
void ppc_invalidate_code_translation(struct cpu *cpu, uint64_t, int)
void ppc32_pc_to_pointers(struct cpu *)
addr & if(addr >=0x24 &&page !=NULL)
int ppc_run_instr(struct cpu *cpu)
void ppc_cpu_tlbdump(struct machine *m, int x, int rawflag)
void ppc_cpu_dumpinfo(struct cpu *cpu)
void(* update_translation_table)(struct cpu *, uint64_t vaddr_page, unsigned char *host_page, int writeflag, uint64_t paddr_page)
void reg_access_msr(struct cpu *cpu, uint64_t *valuep, int writeflag, int check_for_interrupts)
#define CPU_SETTINGS_ADD_REGISTER64(name, var)
void ppc_exception(struct cpu *cpu, int exception_nr)
void ppc_irq_interrupt_assert(struct interrupt *interrupt)
void(* invalidate_code_translation)(struct cpu *, uint64_t paddr, int flags)
void COMBINE() strlen(struct cpu *cpu, struct arm_instr_call *ic, int low_addr)
void fatal(const char *fmt,...)
#define PPC_HI6_ADDIC_DOT
int ppc32_run_instr(struct cpu *cpu)
#define PPC_HI6_ANDIS_DOT
void ppc32_invalidate_translation_caches(struct cpu *cpu, uint64_t, int)
void update_cr0(struct cpu *cpu, uint64_t value)
void ppc_invalidate_translation_caches(struct cpu *cpu, uint64_t, int)
void(* invalidate_translation_caches)(struct cpu *, uint64_t paddr, int flags)
int(* translate_v2p)(struct cpu *, uint64_t vaddr, uint64_t *return_paddr, int flags)
void ppc32_update_translation_table(struct cpu *cpu, uint64_t vaddr_page, unsigned char *host_page, int writeflag, uint64_t paddr_page)
int ppc_translate_v2p(struct cpu *cpu, uint64_t vaddr, uint64_t *return_paddr, int flags)
uint32_t physical_ram_in_mb
#define EMUL_LITTLE_ENDIAN
void ppc_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
#define PPC_EXCEPTION_DEC
int(* run_instr)(struct cpu *cpu)
int ppc_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr, unsigned char *data, size_t len, int writeflag, int cache_flags)
void(* interrupt_assert)(struct interrupt *)
struct ppc_cpu_type_def cpu_type
void interrupt_handler_register(struct interrupt *templ)
int ppc_cpu_disassemble_instr(struct cpu *cpu, unsigned char *instr, int running, uint64_t dumpaddr)
void ppc_pc_to_pointers(struct cpu *)
void ppc_update_translation_table(struct cpu *cpu, uint64_t vaddr_page, unsigned char *host_page, int writeflag, uint64_t paddr_page)
uint64_t tgpr[PPC_N_TGPRS]
int(* memory_rw)(struct cpu *cpu, struct memory *mem, uint64_t vaddr, unsigned char *data, size_t len, int writeflag, int cache_flags)
void ppc_cpu_list_available_types(void)
void load(FILE *fh, unsigned char *ptr, unsigned long sz)
void ppc32_invalidate_code_translation(struct cpu *cpu, uint64_t, int)
#define PPC_CPU_TYPE_DEFS
void ppc_irq_interrupt_deassert(struct interrupt *interrupt)
Generated on Tue Aug 25 2020 19:25:06 for GXemul by
1.8.18