cpu_arm.h File Reference

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cpu_arm.h File Reference
#include "misc.h"
#include "interrupt.h"

Go to the source code of this file.

Classes

struct  arm_cpu_type_def
 
struct  arm_cpu
 

Macros

#define ARM_SL   10
 
#define ARM_FP   11
 
#define ARM_IP   12
 
#define ARM_SP   13
 
#define ARM_LR   14
 
#define ARM_PC   15
 
#define N_ARM_REGS   16
 
#define ARM_REG_NAMES
 
#define ARM_CONDITION_STRINGS
 
#define ARM_DPI_NAMES
 
#define ARM_THUMB_DPI_NAMES
 
#define ARM_IC_ENTRIES_SHIFT   10
 
#define ARM_N_IC_ARGS   3
 
#define ARM_INSTR_ALIGNMENT_SHIFT   2
 
#define ARM_IC_ENTRIES_PER_PAGE   (1 << ARM_IC_ENTRIES_SHIFT)
 
#define ARM_PC_TO_IC_ENTRY(a)
 
#define ARM_ADDR_TO_PAGENR(a)
 
#define ARM_F_N   8 /* Same as ARM_FLAG_*, but */
 
#define ARM_F_Z   4 /* for the 'flags' field instead */
 
#define ARM_F_C   2 /* of cpsr. */
 
#define ARM_F_V   1
 
#define ARM_FLAG_N   0x80000000 /* Negative flag */
 
#define ARM_FLAG_Z   0x40000000 /* Zero flag */
 
#define ARM_FLAG_C   0x20000000 /* Carry flag */
 
#define ARM_FLAG_V   0x10000000 /* Overflow flag */
 
#define ARM_FLAG_Q   0x08000000 /* DSP saturation overflow */
 
#define ARM_FLAG_J   0x01000000 /* Java flag (BXJ instruction ARMv5J) */
 
#define ARM_FLAG_E   0x00000200 /* Data Endianness (SETEND instruction ARMv6) */
 
#define ARM_FLAG_A   0x00000100 /* A = 1 disables Imprecise Data Aborts (ARMv6) */
 
#define ARM_FLAG_I   0x00000080 /* Interrupt disable */
 
#define ARM_FLAG_F   0x00000040 /* Fast Interrupt disable */
 
#define ARM_FLAG_T   0x00000020 /* Thumb mode */
 
#define ARM_FLAG_MODE   0x0000001f
 
#define ARM_MODE_USR26   0x00
 
#define ARM_MODE_FIQ26   0x01
 
#define ARM_MODE_IRQ26   0x02
 
#define ARM_MODE_SVC26   0x03
 
#define ARM_MODE_USR32   0x10
 
#define ARM_MODE_FIQ32   0x11
 
#define ARM_MODE_IRQ32   0x12
 
#define ARM_MODE_SVC32   0x13
 
#define ARM_MODE_ABT32   0x17
 
#define ARM_MODE_UND32   0x1b
 
#define ARM_MODE_SYS32   0x1f
 
#define ARM_EXCEPTION_TO_MODE
 
#define N_ARM_EXCEPTIONS   8
 
#define ARM_EXCEPTION_RESET   0
 
#define ARM_EXCEPTION_UND   1
 
#define ARM_EXCEPTION_SWI   2
 
#define ARM_EXCEPTION_PREF_ABT   3
 
#define ARM_EXCEPTION_DATA_ABT   4
 
#define ARM_EXCEPTION_IRQ   6
 
#define ARM_EXCEPTION_FIQ   7
 
#define ARM_MAX_VPH_TLB_ENTRIES   384
 
#define ARM_CONTROL_MMU   0x0001
 
#define ARM_CONTROL_ALIGN   0x0002
 
#define ARM_CONTROL_CACHE   0x0004
 
#define ARM_CONTROL_WBUFFER   0x0008
 
#define ARM_CONTROL_PROG32   0x0010
 
#define ARM_CONTROL_DATA32   0x0020
 
#define ARM_CONTROL_BIG   0x0080
 
#define ARM_CONTROL_S   0x0100
 
#define ARM_CONTROL_R   0x0200
 
#define ARM_CONTROL_F   0x0400
 
#define ARM_CONTROL_Z   0x0800
 
#define ARM_CONTROL_ICACHE   0x1000
 
#define ARM_CONTROL_V   0x2000
 
#define ARM_CONTROL_RR   0x4000
 
#define ARM_CONTROL_L4   0x8000
 
#define ARM_AUXCTRL_MD   0x30 /* MiniData Cache Attribute */
 
#define ARM_AUXCTRL_MD_SHIFT   4
 
#define ARM_AUXCTRL_P   0x02 /* Page Table Memory Attribute */
 
#define ARM_AUXCTRL_K   0x01 /* Write Buffer Coalescing Disable */
 
#define ARM_CACHETYPE_CLASS   0x1e000000
 
#define ARM_CACHETYPE_CLASS_SHIFT   25
 
#define ARM_CACHETYPE_HARVARD   0x01000000
 
#define ARM_CACHETYPE_HARVARD_SHIFT   24
 
#define ARM_CACHETYPE_DSIZE   0x001c0000
 
#define ARM_CACHETYPE_DSIZE_SHIFT   18
 
#define ARM_CACHETYPE_DASSOC   0x00038000
 
#define ARM_CACHETYPE_DASSOC_SHIFT   15
 
#define ARM_CACHETYPE_DLINE   0x00003000
 
#define ARM_CACHETYPE_DLINE_SHIFT   12
 
#define ARM_CACHETYPE_ISIZE   0x000001c0
 
#define ARM_CACHETYPE_ISIZE_SHIFT   6
 
#define ARM_CACHETYPE_IASSOC   0x00000038
 
#define ARM_CACHETYPE_IASSOC_SHIFT   3
 
#define ARM_CACHETYPE_ILINE   0x00000003
 
#define ARM_CACHETYPE_ILINE_SHIFT   0
 

Functions

void arm_setup_initial_translation_table (struct cpu *cpu, uint32_t ttb_addr)
 
void arm_translation_table_set_l1 (struct cpu *cpu, uint32_t vaddr, uint32_t paddr)
 
void arm_translation_table_set_l1_b (struct cpu *cpu, uint32_t vaddr, uint32_t paddr)
 
void arm_exception (struct cpu *, int)
 
int arm_cpu_interpret_thumb_SLOW (struct cpu *)
 
int arm_run_instr (struct cpu *cpu)
 
void arm_update_translation_table (struct cpu *cpu, uint64_t vaddr_page, unsigned char *host_page, int writeflag, uint64_t paddr_page)
 
void arm_invalidate_translation_caches (struct cpu *cpu, uint64_t, int)
 
void arm_invalidate_code_translation (struct cpu *cpu, uint64_t, int)
 
void arm_load_register_bank (struct cpu *cpu)
 
void arm_save_register_bank (struct cpu *cpu)
 
int arm_memory_rw (struct cpu *cpu, struct memory *mem, uint64_t vaddr, unsigned char *data, size_t len, int writeflag, int cache_flags)
 
int arm_cpu_family_init (struct cpu_family *)
 
void arm_coproc_15 (struct cpu *cpu, int opcode1, int opcode2, int l_bit, int crn, int crm, int rd)
 
void arm_coproc_i80321_6 (struct cpu *cpu, int opcode1, int opcode2, int l_bit, int crn, int crm, int rd)
 
void arm_coproc_xscale_14 (struct cpu *cpu, int opcode1, int opcode2, int l_bit, int crn, int crm, int rd)
 
void arm_push (struct cpu *cpu, uint32_t *np, int p_bit, int u_bit, int s_bit, int w_bit, uint16_t regs)
 
void arm_pop (struct cpu *cpu, uint32_t *np, int p_bit, int u_bit, int s_bit, int w_bit, uint32_t iw)
 
int arm_translate_v2p (struct cpu *cpu, uint64_t vaddr, uint64_t *return_addr, int flags)
 
int arm_translate_v2p_mmu (struct cpu *cpu, uint64_t vaddr, uint64_t *return_addr, int flags)
 

Macro Definition Documentation

◆ ARM_ADDR_TO_PAGENR

#define ARM_ADDR_TO_PAGENR (   a)
Value:

Definition at line 84 of file cpu_arm.h.

◆ ARM_AUXCTRL_K

#define ARM_AUXCTRL_K   0x01 /* Write Buffer Coalescing Disable */

Definition at line 278 of file cpu_arm.h.

◆ ARM_AUXCTRL_MD

#define ARM_AUXCTRL_MD   0x30 /* MiniData Cache Attribute */

Definition at line 275 of file cpu_arm.h.

◆ ARM_AUXCTRL_MD_SHIFT

#define ARM_AUXCTRL_MD_SHIFT   4

Definition at line 276 of file cpu_arm.h.

◆ ARM_AUXCTRL_P

#define ARM_AUXCTRL_P   0x02 /* Page Table Memory Attribute */

Definition at line 277 of file cpu_arm.h.

◆ ARM_CACHETYPE_CLASS

#define ARM_CACHETYPE_CLASS   0x1e000000

Definition at line 281 of file cpu_arm.h.

◆ ARM_CACHETYPE_CLASS_SHIFT

#define ARM_CACHETYPE_CLASS_SHIFT   25

Definition at line 282 of file cpu_arm.h.

◆ ARM_CACHETYPE_DASSOC

#define ARM_CACHETYPE_DASSOC   0x00038000

Definition at line 287 of file cpu_arm.h.

◆ ARM_CACHETYPE_DASSOC_SHIFT

#define ARM_CACHETYPE_DASSOC_SHIFT   15

Definition at line 288 of file cpu_arm.h.

◆ ARM_CACHETYPE_DLINE

#define ARM_CACHETYPE_DLINE   0x00003000

Definition at line 289 of file cpu_arm.h.

◆ ARM_CACHETYPE_DLINE_SHIFT

#define ARM_CACHETYPE_DLINE_SHIFT   12

Definition at line 290 of file cpu_arm.h.

◆ ARM_CACHETYPE_DSIZE

#define ARM_CACHETYPE_DSIZE   0x001c0000

Definition at line 285 of file cpu_arm.h.

◆ ARM_CACHETYPE_DSIZE_SHIFT

#define ARM_CACHETYPE_DSIZE_SHIFT   18

Definition at line 286 of file cpu_arm.h.

◆ ARM_CACHETYPE_HARVARD

#define ARM_CACHETYPE_HARVARD   0x01000000

Definition at line 283 of file cpu_arm.h.

◆ ARM_CACHETYPE_HARVARD_SHIFT

#define ARM_CACHETYPE_HARVARD_SHIFT   24

Definition at line 284 of file cpu_arm.h.

◆ ARM_CACHETYPE_IASSOC

#define ARM_CACHETYPE_IASSOC   0x00000038

Definition at line 293 of file cpu_arm.h.

◆ ARM_CACHETYPE_IASSOC_SHIFT

#define ARM_CACHETYPE_IASSOC_SHIFT   3

Definition at line 294 of file cpu_arm.h.

◆ ARM_CACHETYPE_ILINE

#define ARM_CACHETYPE_ILINE   0x00000003

Definition at line 295 of file cpu_arm.h.

◆ ARM_CACHETYPE_ILINE_SHIFT

#define ARM_CACHETYPE_ILINE_SHIFT   0

Definition at line 296 of file cpu_arm.h.

◆ ARM_CACHETYPE_ISIZE

#define ARM_CACHETYPE_ISIZE   0x000001c0

Definition at line 291 of file cpu_arm.h.

◆ ARM_CACHETYPE_ISIZE_SHIFT

#define ARM_CACHETYPE_ISIZE_SHIFT   6

Definition at line 292 of file cpu_arm.h.

◆ ARM_CONDITION_STRINGS

#define ARM_CONDITION_STRINGS
Value:
{ \
"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc", \
"hi", "ls", "ge", "lt", "gt", "le", "" /*Always*/ , "(INVALID)" }

Definition at line 64 of file cpu_arm.h.

◆ ARM_CONTROL_ALIGN

#define ARM_CONTROL_ALIGN   0x0002

Definition at line 259 of file cpu_arm.h.

◆ ARM_CONTROL_BIG

#define ARM_CONTROL_BIG   0x0080

Definition at line 264 of file cpu_arm.h.

◆ ARM_CONTROL_CACHE

#define ARM_CONTROL_CACHE   0x0004

Definition at line 260 of file cpu_arm.h.

◆ ARM_CONTROL_DATA32

#define ARM_CONTROL_DATA32   0x0020

Definition at line 263 of file cpu_arm.h.

◆ ARM_CONTROL_F

#define ARM_CONTROL_F   0x0400

Definition at line 267 of file cpu_arm.h.

◆ ARM_CONTROL_ICACHE

#define ARM_CONTROL_ICACHE   0x1000

Definition at line 269 of file cpu_arm.h.

◆ ARM_CONTROL_L4

#define ARM_CONTROL_L4   0x8000

Definition at line 272 of file cpu_arm.h.

◆ ARM_CONTROL_MMU

#define ARM_CONTROL_MMU   0x0001

Definition at line 258 of file cpu_arm.h.

◆ ARM_CONTROL_PROG32

#define ARM_CONTROL_PROG32   0x0010

Definition at line 262 of file cpu_arm.h.

◆ ARM_CONTROL_R

#define ARM_CONTROL_R   0x0200

Definition at line 266 of file cpu_arm.h.

◆ ARM_CONTROL_RR

#define ARM_CONTROL_RR   0x4000

Definition at line 271 of file cpu_arm.h.

◆ ARM_CONTROL_S

#define ARM_CONTROL_S   0x0100

Definition at line 265 of file cpu_arm.h.

◆ ARM_CONTROL_V

#define ARM_CONTROL_V   0x2000

Definition at line 270 of file cpu_arm.h.

◆ ARM_CONTROL_WBUFFER

#define ARM_CONTROL_WBUFFER   0x0008

Definition at line 261 of file cpu_arm.h.

◆ ARM_CONTROL_Z

#define ARM_CONTROL_Z   0x0800

Definition at line 268 of file cpu_arm.h.

◆ ARM_DPI_NAMES

#define ARM_DPI_NAMES
Value:
{ \
"and", "eor", "sub", "rsb", "add", "adc", "sbc", "rsc", \
"tst", "teq", "cmp", "cmn", "orr", "mov", "bic", "mvn" }

Definition at line 69 of file cpu_arm.h.

◆ ARM_EXCEPTION_DATA_ABT

#define ARM_EXCEPTION_DATA_ABT   4

Definition at line 127 of file cpu_arm.h.

◆ ARM_EXCEPTION_FIQ

#define ARM_EXCEPTION_FIQ   7

Definition at line 130 of file cpu_arm.h.

◆ ARM_EXCEPTION_IRQ

#define ARM_EXCEPTION_IRQ   6

Definition at line 129 of file cpu_arm.h.

◆ ARM_EXCEPTION_PREF_ABT

#define ARM_EXCEPTION_PREF_ABT   3

Definition at line 126 of file cpu_arm.h.

◆ ARM_EXCEPTION_RESET

#define ARM_EXCEPTION_RESET   0

Definition at line 123 of file cpu_arm.h.

◆ ARM_EXCEPTION_SWI

#define ARM_EXCEPTION_SWI   2

Definition at line 125 of file cpu_arm.h.

◆ ARM_EXCEPTION_TO_MODE

#define ARM_EXCEPTION_TO_MODE
Value:
{ \
ARM_MODE_ABT32, 0, ARM_MODE_IRQ32, ARM_MODE_FIQ32 }

Definition at line 117 of file cpu_arm.h.

◆ ARM_EXCEPTION_UND

#define ARM_EXCEPTION_UND   1

Definition at line 124 of file cpu_arm.h.

◆ ARM_F_C

#define ARM_F_C   2 /* of cpsr. */

Definition at line 89 of file cpu_arm.h.

◆ ARM_F_N

#define ARM_F_N   8 /* Same as ARM_FLAG_*, but */

Definition at line 87 of file cpu_arm.h.

◆ ARM_F_V

#define ARM_F_V   1

Definition at line 90 of file cpu_arm.h.

◆ ARM_F_Z

#define ARM_F_Z   4 /* for the 'flags' field instead */

Definition at line 88 of file cpu_arm.h.

◆ ARM_FLAG_A

#define ARM_FLAG_A   0x00000100 /* A = 1 disables Imprecise Data Aborts (ARMv6) */

Definition at line 99 of file cpu_arm.h.

◆ ARM_FLAG_C

#define ARM_FLAG_C   0x20000000 /* Carry flag */

Definition at line 94 of file cpu_arm.h.

◆ ARM_FLAG_E

#define ARM_FLAG_E   0x00000200 /* Data Endianness (SETEND instruction ARMv6) */

Definition at line 98 of file cpu_arm.h.

◆ ARM_FLAG_F

#define ARM_FLAG_F   0x00000040 /* Fast Interrupt disable */

Definition at line 101 of file cpu_arm.h.

◆ ARM_FLAG_I

#define ARM_FLAG_I   0x00000080 /* Interrupt disable */

Definition at line 100 of file cpu_arm.h.

◆ ARM_FLAG_J

#define ARM_FLAG_J   0x01000000 /* Java flag (BXJ instruction ARMv5J) */

Definition at line 97 of file cpu_arm.h.

◆ ARM_FLAG_MODE

#define ARM_FLAG_MODE   0x0000001f

Definition at line 104 of file cpu_arm.h.

◆ ARM_FLAG_N

#define ARM_FLAG_N   0x80000000 /* Negative flag */

Definition at line 92 of file cpu_arm.h.

◆ ARM_FLAG_Q

#define ARM_FLAG_Q   0x08000000 /* DSP saturation overflow */

Definition at line 96 of file cpu_arm.h.

◆ ARM_FLAG_T

#define ARM_FLAG_T   0x00000020 /* Thumb mode */

Definition at line 102 of file cpu_arm.h.

◆ ARM_FLAG_V

#define ARM_FLAG_V   0x10000000 /* Overflow flag */

Definition at line 95 of file cpu_arm.h.

◆ ARM_FLAG_Z

#define ARM_FLAG_Z   0x40000000 /* Zero flag */

Definition at line 93 of file cpu_arm.h.

◆ ARM_FP

#define ARM_FP   11

Definition at line 53 of file cpu_arm.h.

◆ ARM_IC_ENTRIES_PER_PAGE

#define ARM_IC_ENTRIES_PER_PAGE   (1 << ARM_IC_ENTRIES_SHIFT)

Definition at line 81 of file cpu_arm.h.

◆ ARM_IC_ENTRIES_SHIFT

#define ARM_IC_ENTRIES_SHIFT   10

Definition at line 77 of file cpu_arm.h.

◆ ARM_INSTR_ALIGNMENT_SHIFT

#define ARM_INSTR_ALIGNMENT_SHIFT   2

Definition at line 80 of file cpu_arm.h.

◆ ARM_IP

#define ARM_IP   12

Definition at line 54 of file cpu_arm.h.

◆ ARM_LR

#define ARM_LR   14

Definition at line 56 of file cpu_arm.h.

◆ ARM_MAX_VPH_TLB_ENTRIES

#define ARM_MAX_VPH_TLB_ENTRIES   384

Definition at line 134 of file cpu_arm.h.

◆ ARM_MODE_ABT32

#define ARM_MODE_ABT32   0x17

Definition at line 113 of file cpu_arm.h.

◆ ARM_MODE_FIQ26

#define ARM_MODE_FIQ26   0x01

Definition at line 106 of file cpu_arm.h.

◆ ARM_MODE_FIQ32

#define ARM_MODE_FIQ32   0x11

Definition at line 110 of file cpu_arm.h.

◆ ARM_MODE_IRQ26

#define ARM_MODE_IRQ26   0x02

Definition at line 107 of file cpu_arm.h.

◆ ARM_MODE_IRQ32

#define ARM_MODE_IRQ32   0x12

Definition at line 111 of file cpu_arm.h.

◆ ARM_MODE_SVC26

#define ARM_MODE_SVC26   0x03

Definition at line 108 of file cpu_arm.h.

◆ ARM_MODE_SVC32

#define ARM_MODE_SVC32   0x13

Definition at line 112 of file cpu_arm.h.

◆ ARM_MODE_SYS32

#define ARM_MODE_SYS32   0x1f

Definition at line 115 of file cpu_arm.h.

◆ ARM_MODE_UND32

#define ARM_MODE_UND32   0x1b

Definition at line 114 of file cpu_arm.h.

◆ ARM_MODE_USR26

#define ARM_MODE_USR26   0x00

Definition at line 105 of file cpu_arm.h.

◆ ARM_MODE_USR32

#define ARM_MODE_USR32   0x10

Definition at line 109 of file cpu_arm.h.

◆ ARM_N_IC_ARGS

#define ARM_N_IC_ARGS   3

Definition at line 79 of file cpu_arm.h.

◆ ARM_PC

#define ARM_PC   15

Definition at line 57 of file cpu_arm.h.

◆ ARM_PC_TO_IC_ENTRY

#define ARM_PC_TO_IC_ENTRY (   a)
Value:

Definition at line 82 of file cpu_arm.h.

◆ ARM_REG_NAMES

#define ARM_REG_NAMES
Value:
{ \
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
"r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc" }

Definition at line 60 of file cpu_arm.h.

◆ ARM_SL

#define ARM_SL   10

Definition at line 52 of file cpu_arm.h.

◆ ARM_SP

#define ARM_SP   13

Definition at line 55 of file cpu_arm.h.

◆ ARM_THUMB_DPI_NAMES

#define ARM_THUMB_DPI_NAMES
Value:
{ \
"ands", "eors", "lsls", "lsrs", "asrs", "adcs", "sbcs", "rors", \
"tst", "negs", "cmp", "cmn", "orrs", "muls", "bics", "mvns" }

Definition at line 73 of file cpu_arm.h.

◆ N_ARM_EXCEPTIONS

#define N_ARM_EXCEPTIONS   8

Definition at line 121 of file cpu_arm.h.

◆ N_ARM_REGS

#define N_ARM_REGS   16

Definition at line 58 of file cpu_arm.h.

Function Documentation

◆ arm_coproc_15()

void arm_coproc_15 ( struct cpu cpu,
int  opcode1,
int  opcode2,
int  l_bit,
int  crn,
int  crm,
int  rd 
)

◆ arm_coproc_i80321_6()

void arm_coproc_i80321_6 ( struct cpu cpu,
int  opcode1,
int  opcode2,
int  l_bit,
int  crn,
int  crm,
int  rd 
)

◆ arm_coproc_xscale_14()

void arm_coproc_xscale_14 ( struct cpu cpu,
int  opcode1,
int  opcode2,
int  l_bit,
int  crn,
int  crm,
int  rd 
)

◆ arm_cpu_family_init()

int arm_cpu_family_init ( struct cpu_family )

◆ arm_cpu_interpret_thumb_SLOW()

int arm_cpu_interpret_thumb_SLOW ( struct cpu )

◆ arm_exception()

void arm_exception ( struct cpu ,
int   
)

◆ arm_invalidate_code_translation()

void arm_invalidate_code_translation ( struct cpu cpu,
uint64_t  ,
int   
)

◆ arm_invalidate_translation_caches()

void arm_invalidate_translation_caches ( struct cpu cpu,
uint64_t  ,
int   
)

◆ arm_load_register_bank()

void arm_load_register_bank ( struct cpu cpu)

◆ arm_memory_rw()

int arm_memory_rw ( struct cpu cpu,
struct memory mem,
uint64_t  vaddr,
unsigned char *  data,
size_t  len,
int  writeflag,
int  cache_flags 
)

◆ arm_pop()

void arm_pop ( struct cpu cpu,
uint32_t *  np,
int  p_bit,
int  u_bit,
int  s_bit,
int  w_bit,
uint32_t  iw 
)

◆ arm_push()

void arm_push ( struct cpu cpu,
uint32_t *  np,
int  p_bit,
int  u_bit,
int  s_bit,
int  w_bit,
uint16_t  regs 
)

◆ arm_run_instr()

int arm_run_instr ( struct cpu cpu)

◆ arm_save_register_bank()

void arm_save_register_bank ( struct cpu cpu)

◆ arm_setup_initial_translation_table()

void arm_setup_initial_translation_table ( struct cpu cpu,
uint32_t  ttb_addr 
)

◆ arm_translate_v2p()

int arm_translate_v2p ( struct cpu cpu,
uint64_t  vaddr,
uint64_t *  return_addr,
int  flags 
)

Definition at line 54 of file memory_arm.cc.

Referenced by arm_coproc_15().

◆ arm_translate_v2p_mmu()

int arm_translate_v2p_mmu ( struct cpu cpu,
uint64_t  vaddr,
uint64_t *  return_addr,
int  flags 
)

◆ arm_translation_table_set_l1()

void arm_translation_table_set_l1 ( struct cpu cpu,
uint32_t  vaddr,
uint32_t  paddr 
)

◆ arm_translation_table_set_l1_b()

void arm_translation_table_set_l1_b ( struct cpu cpu,
uint32_t  vaddr,
uint32_t  paddr 
)

◆ arm_update_translation_table()

void arm_update_translation_table ( struct cpu cpu,
uint64_t  vaddr_page,
unsigned char *  host_page,
int  writeflag,
uint64_t  paddr_page 
)
ARM_MODE_SVC32
#define ARM_MODE_SVC32
Definition: cpu_arm.h:111
ARM_IC_ENTRIES_SHIFT
#define ARM_IC_ENTRIES_SHIFT
Definition: cpu_arm.h:76
ARM_IC_ENTRIES_PER_PAGE
#define ARM_IC_ENTRIES_PER_PAGE
Definition: cpu_arm.h:80
ARM_MODE_ABT32
#define ARM_MODE_ABT32
Definition: cpu_arm.h:112
ARM_INSTR_ALIGNMENT_SHIFT
#define ARM_INSTR_ALIGNMENT_SHIFT
Definition: cpu_arm.h:79
ARM_MODE_FIQ32
#define ARM_MODE_FIQ32
Definition: cpu_arm.h:109
ARM_MODE_UND32
#define ARM_MODE_UND32
Definition: cpu_arm.h:113
ARM_MODE_IRQ32
#define ARM_MODE_IRQ32
Definition: cpu_arm.h:110

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