ncr53c9xreg.h File Reference

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Macros
ncr53c9xreg.h File Reference

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Macros

#define NCR_TCL   0x00 /* RW - Transfer Count Low */
 
#define NCR_TCM   0x01 /* RW - Transfer Count Mid */
 
#define NCR_TCH   0x0e /* RW - Transfer Count High */
 
#define NCR_FIFO   0x02 /* RW - FIFO data */
 
#define NCR_CMD   0x03 /* RW - Command (2 deep) */
 
#define NCRCMD_DMA   0x80 /* DMA Bit */
 
#define NCRCMD_NOP   0x00 /* No Operation */
 
#define NCRCMD_FLUSH   0x01 /* Flush FIFO */
 
#define NCRCMD_RSTCHIP   0x02 /* Reset Chip */
 
#define NCRCMD_RSTSCSI   0x03 /* Reset SCSI Bus */
 
#define NCRCMD_RESEL   0x40 /* Reselect Sequence */
 
#define NCRCMD_SELNATN   0x41 /* Select without ATN */
 
#define NCRCMD_SELATN   0x42 /* Select with ATN */
 
#define NCRCMD_SELATNS   0x43 /* Select with ATN & Stop */
 
#define NCRCMD_ENSEL   0x44 /* Enable (Re)Selection */
 
#define NCRCMD_DISSEL   0x45 /* Disable (Re)Selection */
 
#define NCRCMD_SELATN3   0x46 /* Select with ATN3 */
 
#define NCRCMD_RESEL3   0x47 /* Reselect3 Sequence */
 
#define NCRCMD_SNDMSG   0x20 /* Send Message */
 
#define NCRCMD_SNDSTAT   0x21 /* Send Status */
 
#define NCRCMD_SNDDATA   0x22 /* Send Data */
 
#define NCRCMD_DISCSEQ   0x23 /* Disconnect Sequence */
 
#define NCRCMD_TERMSEQ   0x24 /* Terminate Sequence */
 
#define NCRCMD_TCCS   0x25 /* Target Command Comp Seq */
 
#define NCRCMD_DISC   0x27 /* Disconnect */
 
#define NCRCMD_RECMSG   0x28 /* Receive Message */
 
#define NCRCMD_RECCMD   0x29 /* Receive Command */
 
#define NCRCMD_RECDATA   0x2a /* Receive Data */
 
#define NCRCMD_RECCSEQ   0x2b /* Receive Command Sequence*/
 
#define NCRCMD_ABORT   0x04 /* Target Abort DMA */
 
#define NCRCMD_TRANS   0x10 /* Transfer Information */
 
#define NCRCMD_ICCS   0x11 /* Initiator Cmd Comp Seq */
 
#define NCRCMD_MSGOK   0x12 /* Message Accepted */
 
#define NCRCMD_TRPAD   0x18 /* Transfer Pad */
 
#define NCRCMD_SETATN   0x1a /* Set ATN */
 
#define NCRCMD_RSTATN   0x1b /* Reset ATN */
 
#define NCR_STAT   0x04 /* RO - Status */
 
#define NCRSTAT_INT   0x80 /* Interrupt */
 
#define NCRSTAT_GE   0x40 /* Gross Error */
 
#define NCRSTAT_PE   0x20 /* Parity Error */
 
#define NCRSTAT_TC   0x10 /* Terminal Count */
 
#define NCRSTAT_VGC   0x08 /* Valid Group Code */
 
#define NCRSTAT_PHASE   0x07 /* Phase bits */
 
#define NCR_SELID   0x04 /* WO - Select/Reselect Bus ID */
 
#define NCR_BUSID_HME   0x10 /* XXX HME reselect ID */
 
#define NCR_BUSID_HME32   0x40 /* XXX HME to select more than 16 */
 
#define NCR_INTR   0x05 /* RO - Interrupt */
 
#define NCRINTR_SBR   0x80 /* SCSI Bus Reset */
 
#define NCRINTR_ILL   0x40 /* Illegal Command */
 
#define NCRINTR_DIS   0x20 /* Disconnect */
 
#define NCRINTR_BS   0x10 /* Bus Service */
 
#define NCRINTR_FC   0x08 /* Function Complete */
 
#define NCRINTR_RESEL   0x04 /* Reselected */
 
#define NCRINTR_SELATN   0x02 /* Select with ATN */
 
#define NCRINTR_SEL   0x01 /* Selected */
 
#define NCR_TIMEOUT   0x05 /* WO - Select/Reselect Timeout */
 
#define NCR_STEP   0x06 /* RO - Sequence Step */
 
#define NCRSTEP_MASK   0x07 /* the last 3 bits */
 
#define NCRSTEP_DONE   0x04 /* command went out */
 
#define NCR_SYNCTP   0x06 /* WO - Synch Transfer Period */
 
#define NCR_FFLAG   0x07 /* RO - FIFO Flags */
 
#define NCRFIFO_SS   0xe0 /* Sequence Step (Dup) */
 
#define NCRFIFO_FF   0x1f /* Bytes in FIFO */
 
#define NCR_SYNCOFF   0x07 /* WO - Synch Offset */
 
#define NCR_CFG1   0x08 /* RW - Configuration #1 */
 
#define NCRCFG1_SLOW   0x80 /* Slow Cable Mode */
 
#define NCRCFG1_SRR   0x40 /* SCSI Reset Rep Int Dis */
 
#define NCRCFG1_PTEST   0x20 /* Parity Test Mod */
 
#define NCRCFG1_PARENB   0x10 /* Enable Parity Check */
 
#define NCRCFG1_CTEST   0x08 /* Enable Chip Test */
 
#define NCRCFG1_BUSID   0x07 /* Bus ID */
 
#define NCR_CCF   0x09 /* WO - Clock Conversion Factor */
 
#define NCR_TEST   0x0a /* WO - Test (Chip Test Only) */
 
#define NCR_CFG2   0x0b /* RW - Configuration #2 */
 
#define NCRCFG2_RSVD   0xa0 /* reserved */
 
#define NCRCFG2_FE   0x40 /* Features Enable */
 
#define NCRCFG2_DREQ   0x10 /* DREQ High Impedance */
 
#define NCRCFG2_SCSI2   0x08 /* SCSI-2 Enable */
 
#define NCRCFG2_BPA   0x04 /* Target Bad Parity Abort */
 
#define NCRCFG2_RPE   0x02 /* Register Parity Error */
 
#define NCRCFG2_DPE   0x01 /* DMA Parity Error */
 
#define NCRCFG2_HMEFE   0x10 /* HME feature enable */
 
#define NCRCFG2_HME32   0x80 /* HME 32 extended */
 
#define NCR_CFG3   0x0c /* RW - Configuration #3 */
 
#define NCRCFG3_RSVD   0xe0 /* reserved */
 
#define NCRCFG3_IDM   0x10 /* ID Message Res Check */
 
#define NCRCFG3_QTE   0x08 /* Queue Tag Enable */
 
#define NCRCFG3_CDB   0x04 /* CDB 10-bytes OK */
 
#define NCRCFG3_FSCSI   0x02 /* Fast SCSI */
 
#define NCRCFG3_FCLK   0x01 /* Fast Clock (>25Mhz) */
 
#define NCR_ESPCFG3   0x0c /* RW - Configuration #3 */
 
#define NCRESPCFG3_IDM   0x80 /* ID Message Res Check */
 
#define NCRESPCFG3_QTE   0x40 /* Queue Tag Enable */
 
#define NCRESPCFG3_CDB   0x20 /* CDB 10-bytes OK */
 
#define NCRESPCFG3_FSCSI   0x10 /* Fast SCSI */
 
#define NCRESPCFG3_SRESB   0x08 /* Save Residual Byte */
 
#define NCRESPCFG3_FCLK   0x04 /* Fast Clock (>25Mhz) */
 
#define NCRESPCFG3_ADMA   0x02 /* Alternate DMA Mode */
 
#define NCRESPCFG3_T8M   0x01 /* Threshold 8 Mode */
 
#define NCR_F9XCFG3   0x0c /* RW - Configuration #3 */
 
#define NCRF9XCFG3_IDM   0x80 /* ID Message Res Check */
 
#define NCRF9XCFG3_QTE   0x40 /* Queue Tag Enable */
 
#define NCRF9XCFG3_CDB   0x20 /* CDB 10-bytes OK */
 
#define NCRF9XCFG3_FSCSI   0x10 /* Fast SCSI */
 
#define NCRF9XCFG3_FCLK   0x08 /* Fast Clock (>25Mhz) */
 
#define NCRF9XCFG3_SRESB   0x04 /* Save Residual Byte */
 
#define NCRF9XCFG3_ADMA   0x02 /* Alternate DMA Mode */
 
#define NCRF9XCFG3_T8M   0x01 /* Threshold 8 Mode */
 
#define NCRFASCFG3_OBAUTO   0x80 /* auto push odd-byte to dma */
 
#define NCRFASCFG3_EWIDE   0x40 /* Enable Wide-SCSI */
 
#define NCRFASCFG3_IDBIT3   0x20 /* Bit 3 of HME SCSI-ID */
 
#define NCRFASCFG3_IDRESCHK   0x10 /* ID message checking */
 
#define NCRFASCFG3_QUENB   0x08 /* 3-byte msg support */
 
#define NCRFASCFG3_CDB10   0x04 /* group 2 scsi-2 support */
 
#define NCRFASCFG3_FASTSCSI   0x02 /* 10 MB/S fast scsi mode */
 
#define NCRFASCFG3_FASTCLK   0x01 /* fast clock mode */
 
#define NCR_CFG4   0x0d /* RW - Configuration #4 */
 
#define NCRCFG4_CRS1   0x80 /* Select register set #1 */
 
#define NCRCFG4_RSVD   0x7b /* reserved */
 
#define NCRCFG4_ACTNEG   0x04 /* Active negation */
 
#define NCR_JMP   0x00 /* RO - Jumper Sense Register */
 
#define NCRJMP_RSVD   0xc0 /* reserved */
 
#define NCRJMP_ROMSZ   0x20 /* ROM Size 1=16K, 0=32K */
 
#define NCRJMP_J4   0x10 /* Jumper #4 */
 
#define NCRJMP_J3   0x08 /* Jumper #3 */
 
#define NCRJMP_J2   0x04 /* Jumper #2 */
 
#define NCRJMP_J1   0x02 /* Jumper #1 */
 
#define NCRJMP_J0   0x01 /* Jumper #0 */
 
#define NCR_PIOFIFO   0x04 /* WO - PIO FIFO, 4 bytes deep */
 
#define NCR_PSTAT   0x08 /* RW - PIO Status Register */
 
#define NCRPSTAT_PERR   0x80 /* PIO Error */
 
#define NCRPSTAT_SIRQ   0x40 /* Active High of SCSI IRQ */
 
#define NCRPSTAT_ATAI   0x20 /* ATA IRQ */
 
#define NCRPSTAT_FEMPT   0x10 /* PIO FIFO Empty */
 
#define NCRPSTAT_F13   0x08 /* PIO FIFO 1/3 */
 
#define NCRPSTAT_F23   0x04 /* PIO FIFO 2/3 */
 
#define NCRPSTAT_FFULL   0x02 /* PIO FIFO Full */
 
#define NCRPSTAT_PIOM   0x01 /* PIO/DMA Mode */
 
#define NCR_PIOI   0x0b /* RW - PIO Interrupt Enable */
 
#define NCRPIOI_RSVD   0xe0 /* reserved */
 
#define NCRPIOI_EMPTY   0x10 /* IRQ When Empty */
 
#define NCRPIOI_13   0x08 /* IRQ When 1/3 */
 
#define NCRPIOI_23   0x04 /* IRQ When 2/3 */
 
#define NCRPIOI_FULL   0x02 /* IRQ When Full */
 
#define NCRPIOI_FINV   0x01 /* Flag Invert */
 
#define NCR_CFG5   0x0d /* RW - Configuration #5 */
 
#define NCRCFG5_CRS1   0x80 /* Select Register Set #1 */
 
#define NCRCFG5_SRAM   0x40 /* SRAM Memory Map */
 
#define NCRCFG5_AADDR   0x20 /* Auto Address */
 
#define NCRCFG5_PTRINC   0x10 /* Pointer Increment */
 
#define NCRCFG5_LOWPWR   0x08 /* Low Power Mode */
 
#define NCRCFG5_SINT   0x04 /* SCSI Interupt Enable */
 
#define NCRCFG5_INTP   0x02 /* INT Polarity */
 
#define NCRCFG5_AINT   0x01 /* ATA Interupt Enable */
 
#define NCR_SIGNTR   0x0e /* RO - Signature */
 
#define NCR_AMDCFG3   0x0c /* RW - Configuration #3 */
 
#define NCRAMDCFG3_IDM   0x80 /* ID Message Res Check */
 
#define NCRAMDCFG3_QTE   0x40 /* Queue Tag Enable */
 
#define NCRAMDCFG3_CDB   0x20 /* CDB 10-bytes OK */
 
#define NCRAMDCFG3_FSCSI   0x10 /* Fast SCSI */
 
#define NCRAMDCFG3_FCLK   0x08 /* Fast Clock (40MHz) */
 
#define NCRAMDCFG3_RSVD   0x07 /* Reserved */
 
#define NCR_AMDCFG4   0x0d /* RW - Configuration #4 */
 
#define NCRAMDCFG4_GE   0xc0 /* Glitch Eater */
 
#define NCRAMDCFG4_GE12NS   0x00 /* Signal window 12ns */
 
#define NCRAMDCFG4_GE25NS   0x80 /* Signal window 25ns */
 
#define NCRAMDCFG4_GE35NS   0x40 /* Signal window 35ns */
 
#define NCRAMDCFG4_GE0NS   0xc0 /* Signal window 0ns */
 
#define NCRAMDCFG4_PWD   0x20 /* Reduced power feature */
 
#define NCRAMDCFG4_RSVD   0x13 /* Reserved */
 
#define NCRAMDCFG4_RAE   0x08 /* Active neg. REQ/ACK */
 
#define NCRAMDCFG4_RADE   0x04 /* Active neg. REQ/ACK/DAT */
 
#define NCR_RCL   NCR_TCH /* Recommand counter low */
 
#define NCR_RCH   0xf /* Recommand counter high */
 
#define NCR_UID   NCR_RCL /* fas366 part-uniq id */
 
#define NCR_STAT2   NCR_CCF
 
#define NCRFAS_STAT2_SEQCNT   0x01 /* Sequence counter bit 7-3 enabled */
 
#define NCRFAS_STAT2_FLATCHED   0x02 /* FIFO flags register latched */
 
#define NCRFAS_STAT2_CLATCHED   0x04 /* Xfer cntr & recommand ctr latched */
 
#define NCRFAS_STAT2_CACTIVE   0x08 /* Command register is active */
 
#define NCRFAS_STAT2_SCSI16   0x10 /* SCSI interface is wide */
 
#define NCRFAS_STAT2_ISHUTTLE   0x20 /* FIFO Top register contains 1 byte */
 
#define NCRFAS_STAT2_OSHUTTLE   0x40 /* next byte from FIFO is MSB */
 
#define NCRFAS_STAT2_EMPTY   0x80 /* FIFO is empty */
 

Macro Definition Documentation

◆ NCR_AMDCFG3

#define NCR_AMDCFG3   0x0c /* RW - Configuration #3 */

Definition at line 254 of file ncr53c9xreg.h.

◆ NCR_AMDCFG4

#define NCR_AMDCFG4   0x0d /* RW - Configuration #4 */

Definition at line 263 of file ncr53c9xreg.h.

◆ NCR_BUSID_HME

#define NCR_BUSID_HME   0x10 /* XXX HME reselect ID */

Definition at line 89 of file ncr53c9xreg.h.

◆ NCR_BUSID_HME32

#define NCR_BUSID_HME32   0x40 /* XXX HME to select more than 16 */

Definition at line 90 of file ncr53c9xreg.h.

◆ NCR_CCF

#define NCR_CCF   0x09 /* WO - Clock Conversion Factor */

Definition at line 127 of file ncr53c9xreg.h.

◆ NCR_CFG1

#define NCR_CFG1   0x08 /* RW - Configuration #1 */

Definition at line 119 of file ncr53c9xreg.h.

◆ NCR_CFG2

#define NCR_CFG2   0x0b /* RW - Configuration #2 */

Definition at line 139 of file ncr53c9xreg.h.

◆ NCR_CFG3

#define NCR_CFG3   0x0c /* RW - Configuration #3 */

Definition at line 152 of file ncr53c9xreg.h.

◆ NCR_CFG4

#define NCR_CFG4   0x0d /* RW - Configuration #4 */

Definition at line 200 of file ncr53c9xreg.h.

◆ NCR_CFG5

#define NCR_CFG5   0x0d /* RW - Configuration #5 */

Definition at line 241 of file ncr53c9xreg.h.

◆ NCR_CMD

#define NCR_CMD   0x03 /* RW - Command (2 deep) */

Definition at line 47 of file ncr53c9xreg.h.

◆ NCR_ESPCFG3

#define NCR_ESPCFG3   0x0c /* RW - Configuration #3 */

Definition at line 168 of file ncr53c9xreg.h.

◆ NCR_F9XCFG3

#define NCR_F9XCFG3   0x0c /* RW - Configuration #3 */

Definition at line 179 of file ncr53c9xreg.h.

◆ NCR_FFLAG

#define NCR_FFLAG   0x07 /* RO - FIFO Flags */

Definition at line 111 of file ncr53c9xreg.h.

◆ NCR_FIFO

#define NCR_FIFO   0x02 /* RW - FIFO data */

Definition at line 45 of file ncr53c9xreg.h.

◆ NCR_INTR

#define NCR_INTR   0x05 /* RO - Interrupt */

Definition at line 92 of file ncr53c9xreg.h.

◆ NCR_JMP

#define NCR_JMP   0x00 /* RO - Jumper Sense Register */

Definition at line 212 of file ncr53c9xreg.h.

◆ NCR_PIOFIFO

#define NCR_PIOFIFO   0x04 /* WO - PIO FIFO, 4 bytes deep */

Definition at line 221 of file ncr53c9xreg.h.

◆ NCR_PIOI

#define NCR_PIOI   0x0b /* RW - PIO Interrupt Enable */

Definition at line 233 of file ncr53c9xreg.h.

◆ NCR_PSTAT

#define NCR_PSTAT   0x08 /* RW - PIO Status Register */

Definition at line 223 of file ncr53c9xreg.h.

◆ NCR_RCH

#define NCR_RCH   0xf /* Recommand counter high */

Definition at line 278 of file ncr53c9xreg.h.

◆ NCR_RCL

#define NCR_RCL   NCR_TCH /* Recommand counter low */

Definition at line 277 of file ncr53c9xreg.h.

◆ NCR_SELID

#define NCR_SELID   0x04 /* WO - Select/Reselect Bus ID */

Definition at line 88 of file ncr53c9xreg.h.

◆ NCR_SIGNTR

#define NCR_SIGNTR   0x0e /* RO - Signature */

Definition at line 251 of file ncr53c9xreg.h.

◆ NCR_STAT

#define NCR_STAT   0x04 /* RO - Status */

Definition at line 80 of file ncr53c9xreg.h.

◆ NCR_STAT2

#define NCR_STAT2   NCR_CCF

Definition at line 283 of file ncr53c9xreg.h.

◆ NCR_STEP

#define NCR_STEP   0x06 /* RO - Sequence Step */

Definition at line 104 of file ncr53c9xreg.h.

◆ NCR_SYNCOFF

#define NCR_SYNCOFF   0x07 /* WO - Synch Offset */

Definition at line 115 of file ncr53c9xreg.h.

◆ NCR_SYNCTP

#define NCR_SYNCTP   0x06 /* WO - Synch Transfer Period */

Definition at line 108 of file ncr53c9xreg.h.

◆ NCR_TCH

#define NCR_TCH   0x0e /* RW - Transfer Count High */

Definition at line 42 of file ncr53c9xreg.h.

◆ NCR_TCL

#define NCR_TCL   0x00 /* RW - Transfer Count Low */

Definition at line 40 of file ncr53c9xreg.h.

◆ NCR_TCM

#define NCR_TCM   0x01 /* RW - Transfer Count Mid */

Definition at line 41 of file ncr53c9xreg.h.

◆ NCR_TEST

#define NCR_TEST   0x0a /* WO - Test (Chip Test Only) */

Definition at line 137 of file ncr53c9xreg.h.

◆ NCR_TIMEOUT

#define NCR_TIMEOUT   0x05 /* WO - Select/Reselect Timeout */

Definition at line 102 of file ncr53c9xreg.h.

◆ NCR_UID

#define NCR_UID   NCR_RCL /* fas366 part-uniq id */

Definition at line 279 of file ncr53c9xreg.h.

◆ NCRAMDCFG3_CDB

#define NCRAMDCFG3_CDB   0x20 /* CDB 10-bytes OK */

Definition at line 257 of file ncr53c9xreg.h.

◆ NCRAMDCFG3_FCLK

#define NCRAMDCFG3_FCLK   0x08 /* Fast Clock (40MHz) */

Definition at line 259 of file ncr53c9xreg.h.

◆ NCRAMDCFG3_FSCSI

#define NCRAMDCFG3_FSCSI   0x10 /* Fast SCSI */

Definition at line 258 of file ncr53c9xreg.h.

◆ NCRAMDCFG3_IDM

#define NCRAMDCFG3_IDM   0x80 /* ID Message Res Check */

Definition at line 255 of file ncr53c9xreg.h.

◆ NCRAMDCFG3_QTE

#define NCRAMDCFG3_QTE   0x40 /* Queue Tag Enable */

Definition at line 256 of file ncr53c9xreg.h.

◆ NCRAMDCFG3_RSVD

#define NCRAMDCFG3_RSVD   0x07 /* Reserved */

Definition at line 260 of file ncr53c9xreg.h.

◆ NCRAMDCFG4_GE

#define NCRAMDCFG4_GE   0xc0 /* Glitch Eater */

Definition at line 264 of file ncr53c9xreg.h.

◆ NCRAMDCFG4_GE0NS

#define NCRAMDCFG4_GE0NS   0xc0 /* Signal window 0ns */

Definition at line 268 of file ncr53c9xreg.h.

◆ NCRAMDCFG4_GE12NS

#define NCRAMDCFG4_GE12NS   0x00 /* Signal window 12ns */

Definition at line 265 of file ncr53c9xreg.h.

◆ NCRAMDCFG4_GE25NS

#define NCRAMDCFG4_GE25NS   0x80 /* Signal window 25ns */

Definition at line 266 of file ncr53c9xreg.h.

◆ NCRAMDCFG4_GE35NS

#define NCRAMDCFG4_GE35NS   0x40 /* Signal window 35ns */

Definition at line 267 of file ncr53c9xreg.h.

◆ NCRAMDCFG4_PWD

#define NCRAMDCFG4_PWD   0x20 /* Reduced power feature */

Definition at line 269 of file ncr53c9xreg.h.

◆ NCRAMDCFG4_RADE

#define NCRAMDCFG4_RADE   0x04 /* Active neg. REQ/ACK/DAT */

Definition at line 272 of file ncr53c9xreg.h.

◆ NCRAMDCFG4_RAE

#define NCRAMDCFG4_RAE   0x08 /* Active neg. REQ/ACK */

Definition at line 271 of file ncr53c9xreg.h.

◆ NCRAMDCFG4_RSVD

#define NCRAMDCFG4_RSVD   0x13 /* Reserved */

Definition at line 270 of file ncr53c9xreg.h.

◆ NCRCFG1_BUSID

#define NCRCFG1_BUSID   0x07 /* Bus ID */

Definition at line 125 of file ncr53c9xreg.h.

◆ NCRCFG1_CTEST

#define NCRCFG1_CTEST   0x08 /* Enable Chip Test */

Definition at line 124 of file ncr53c9xreg.h.

◆ NCRCFG1_PARENB

#define NCRCFG1_PARENB   0x10 /* Enable Parity Check */

Definition at line 123 of file ncr53c9xreg.h.

◆ NCRCFG1_PTEST

#define NCRCFG1_PTEST   0x20 /* Parity Test Mod */

Definition at line 122 of file ncr53c9xreg.h.

◆ NCRCFG1_SLOW

#define NCRCFG1_SLOW   0x80 /* Slow Cable Mode */

Definition at line 120 of file ncr53c9xreg.h.

◆ NCRCFG1_SRR

#define NCRCFG1_SRR   0x40 /* SCSI Reset Rep Int Dis */

Definition at line 121 of file ncr53c9xreg.h.

◆ NCRCFG2_BPA

#define NCRCFG2_BPA   0x04 /* Target Bad Parity Abort */

Definition at line 144 of file ncr53c9xreg.h.

◆ NCRCFG2_DPE

#define NCRCFG2_DPE   0x01 /* DMA Parity Error */

Definition at line 146 of file ncr53c9xreg.h.

◆ NCRCFG2_DREQ

#define NCRCFG2_DREQ   0x10 /* DREQ High Impedance */

Definition at line 142 of file ncr53c9xreg.h.

◆ NCRCFG2_FE

#define NCRCFG2_FE   0x40 /* Features Enable */

Definition at line 141 of file ncr53c9xreg.h.

◆ NCRCFG2_HME32

#define NCRCFG2_HME32   0x80 /* HME 32 extended */

Definition at line 149 of file ncr53c9xreg.h.

◆ NCRCFG2_HMEFE

#define NCRCFG2_HMEFE   0x10 /* HME feature enable */

Definition at line 148 of file ncr53c9xreg.h.

◆ NCRCFG2_RPE

#define NCRCFG2_RPE   0x02 /* Register Parity Error */

Definition at line 145 of file ncr53c9xreg.h.

◆ NCRCFG2_RSVD

#define NCRCFG2_RSVD   0xa0 /* reserved */

Definition at line 140 of file ncr53c9xreg.h.

◆ NCRCFG2_SCSI2

#define NCRCFG2_SCSI2   0x08 /* SCSI-2 Enable */

Definition at line 143 of file ncr53c9xreg.h.

◆ NCRCFG3_CDB

#define NCRCFG3_CDB   0x04 /* CDB 10-bytes OK */

Definition at line 156 of file ncr53c9xreg.h.

◆ NCRCFG3_FCLK

#define NCRCFG3_FCLK   0x01 /* Fast Clock (>25Mhz) */

Definition at line 158 of file ncr53c9xreg.h.

◆ NCRCFG3_FSCSI

#define NCRCFG3_FSCSI   0x02 /* Fast SCSI */

Definition at line 157 of file ncr53c9xreg.h.

◆ NCRCFG3_IDM

#define NCRCFG3_IDM   0x10 /* ID Message Res Check */

Definition at line 154 of file ncr53c9xreg.h.

◆ NCRCFG3_QTE

#define NCRCFG3_QTE   0x08 /* Queue Tag Enable */

Definition at line 155 of file ncr53c9xreg.h.

◆ NCRCFG3_RSVD

#define NCRCFG3_RSVD   0xe0 /* reserved */

Definition at line 153 of file ncr53c9xreg.h.

◆ NCRCFG4_ACTNEG

#define NCRCFG4_ACTNEG   0x04 /* Active negation */

Definition at line 203 of file ncr53c9xreg.h.

◆ NCRCFG4_CRS1

#define NCRCFG4_CRS1   0x80 /* Select register set #1 */

Definition at line 201 of file ncr53c9xreg.h.

◆ NCRCFG4_RSVD

#define NCRCFG4_RSVD   0x7b /* reserved */

Definition at line 202 of file ncr53c9xreg.h.

◆ NCRCFG5_AADDR

#define NCRCFG5_AADDR   0x20 /* Auto Address */

Definition at line 244 of file ncr53c9xreg.h.

◆ NCRCFG5_AINT

#define NCRCFG5_AINT   0x01 /* ATA Interupt Enable */

Definition at line 249 of file ncr53c9xreg.h.

◆ NCRCFG5_CRS1

#define NCRCFG5_CRS1   0x80 /* Select Register Set #1 */

Definition at line 242 of file ncr53c9xreg.h.

◆ NCRCFG5_INTP

#define NCRCFG5_INTP   0x02 /* INT Polarity */

Definition at line 248 of file ncr53c9xreg.h.

◆ NCRCFG5_LOWPWR

#define NCRCFG5_LOWPWR   0x08 /* Low Power Mode */

Definition at line 246 of file ncr53c9xreg.h.

◆ NCRCFG5_PTRINC

#define NCRCFG5_PTRINC   0x10 /* Pointer Increment */

Definition at line 245 of file ncr53c9xreg.h.

◆ NCRCFG5_SINT

#define NCRCFG5_SINT   0x04 /* SCSI Interupt Enable */

Definition at line 247 of file ncr53c9xreg.h.

◆ NCRCFG5_SRAM

#define NCRCFG5_SRAM   0x40 /* SRAM Memory Map */

Definition at line 243 of file ncr53c9xreg.h.

◆ NCRCMD_ABORT

#define NCRCMD_ABORT   0x04 /* Target Abort DMA */

Definition at line 72 of file ncr53c9xreg.h.

◆ NCRCMD_DISC

#define NCRCMD_DISC   0x27 /* Disconnect */

Definition at line 67 of file ncr53c9xreg.h.

◆ NCRCMD_DISCSEQ

#define NCRCMD_DISCSEQ   0x23 /* Disconnect Sequence */

Definition at line 64 of file ncr53c9xreg.h.

◆ NCRCMD_DISSEL

#define NCRCMD_DISSEL   0x45 /* Disable (Re)Selection */

Definition at line 58 of file ncr53c9xreg.h.

◆ NCRCMD_DMA

#define NCRCMD_DMA   0x80 /* DMA Bit */

Definition at line 48 of file ncr53c9xreg.h.

◆ NCRCMD_ENSEL

#define NCRCMD_ENSEL   0x44 /* Enable (Re)Selection */

Definition at line 57 of file ncr53c9xreg.h.

◆ NCRCMD_FLUSH

#define NCRCMD_FLUSH   0x01 /* Flush FIFO */

Definition at line 50 of file ncr53c9xreg.h.

◆ NCRCMD_ICCS

#define NCRCMD_ICCS   0x11 /* Initiator Cmd Comp Seq */

Definition at line 74 of file ncr53c9xreg.h.

◆ NCRCMD_MSGOK

#define NCRCMD_MSGOK   0x12 /* Message Accepted */

Definition at line 75 of file ncr53c9xreg.h.

◆ NCRCMD_NOP

#define NCRCMD_NOP   0x00 /* No Operation */

Definition at line 49 of file ncr53c9xreg.h.

◆ NCRCMD_RECCMD

#define NCRCMD_RECCMD   0x29 /* Receive Command */

Definition at line 69 of file ncr53c9xreg.h.

◆ NCRCMD_RECCSEQ

#define NCRCMD_RECCSEQ   0x2b /* Receive Command Sequence*/

Definition at line 71 of file ncr53c9xreg.h.

◆ NCRCMD_RECDATA

#define NCRCMD_RECDATA   0x2a /* Receive Data */

Definition at line 70 of file ncr53c9xreg.h.

◆ NCRCMD_RECMSG

#define NCRCMD_RECMSG   0x28 /* Receive Message */

Definition at line 68 of file ncr53c9xreg.h.

◆ NCRCMD_RESEL

#define NCRCMD_RESEL   0x40 /* Reselect Sequence */

Definition at line 53 of file ncr53c9xreg.h.

◆ NCRCMD_RESEL3

#define NCRCMD_RESEL3   0x47 /* Reselect3 Sequence */

Definition at line 60 of file ncr53c9xreg.h.

◆ NCRCMD_RSTATN

#define NCRCMD_RSTATN   0x1b /* Reset ATN */

Definition at line 78 of file ncr53c9xreg.h.

◆ NCRCMD_RSTCHIP

#define NCRCMD_RSTCHIP   0x02 /* Reset Chip */

Definition at line 51 of file ncr53c9xreg.h.

◆ NCRCMD_RSTSCSI

#define NCRCMD_RSTSCSI   0x03 /* Reset SCSI Bus */

Definition at line 52 of file ncr53c9xreg.h.

◆ NCRCMD_SELATN

#define NCRCMD_SELATN   0x42 /* Select with ATN */

Definition at line 55 of file ncr53c9xreg.h.

◆ NCRCMD_SELATN3

#define NCRCMD_SELATN3   0x46 /* Select with ATN3 */

Definition at line 59 of file ncr53c9xreg.h.

◆ NCRCMD_SELATNS

#define NCRCMD_SELATNS   0x43 /* Select with ATN & Stop */

Definition at line 56 of file ncr53c9xreg.h.

◆ NCRCMD_SELNATN

#define NCRCMD_SELNATN   0x41 /* Select without ATN */

Definition at line 54 of file ncr53c9xreg.h.

◆ NCRCMD_SETATN

#define NCRCMD_SETATN   0x1a /* Set ATN */

Definition at line 77 of file ncr53c9xreg.h.

◆ NCRCMD_SNDDATA

#define NCRCMD_SNDDATA   0x22 /* Send Data */

Definition at line 63 of file ncr53c9xreg.h.

◆ NCRCMD_SNDMSG

#define NCRCMD_SNDMSG   0x20 /* Send Message */

Definition at line 61 of file ncr53c9xreg.h.

◆ NCRCMD_SNDSTAT

#define NCRCMD_SNDSTAT   0x21 /* Send Status */

Definition at line 62 of file ncr53c9xreg.h.

◆ NCRCMD_TCCS

#define NCRCMD_TCCS   0x25 /* Target Command Comp Seq */

Definition at line 66 of file ncr53c9xreg.h.

◆ NCRCMD_TERMSEQ

#define NCRCMD_TERMSEQ   0x24 /* Terminate Sequence */

Definition at line 65 of file ncr53c9xreg.h.

◆ NCRCMD_TRANS

#define NCRCMD_TRANS   0x10 /* Transfer Information */

Definition at line 73 of file ncr53c9xreg.h.

◆ NCRCMD_TRPAD

#define NCRCMD_TRPAD   0x18 /* Transfer Pad */

Definition at line 76 of file ncr53c9xreg.h.

◆ NCRESPCFG3_ADMA

#define NCRESPCFG3_ADMA   0x02 /* Alternate DMA Mode */

Definition at line 175 of file ncr53c9xreg.h.

◆ NCRESPCFG3_CDB

#define NCRESPCFG3_CDB   0x20 /* CDB 10-bytes OK */

Definition at line 171 of file ncr53c9xreg.h.

◆ NCRESPCFG3_FCLK

#define NCRESPCFG3_FCLK   0x04 /* Fast Clock (>25Mhz) */

Definition at line 174 of file ncr53c9xreg.h.

◆ NCRESPCFG3_FSCSI

#define NCRESPCFG3_FSCSI   0x10 /* Fast SCSI */

Definition at line 172 of file ncr53c9xreg.h.

◆ NCRESPCFG3_IDM

#define NCRESPCFG3_IDM   0x80 /* ID Message Res Check */

Definition at line 169 of file ncr53c9xreg.h.

◆ NCRESPCFG3_QTE

#define NCRESPCFG3_QTE   0x40 /* Queue Tag Enable */

Definition at line 170 of file ncr53c9xreg.h.

◆ NCRESPCFG3_SRESB

#define NCRESPCFG3_SRESB   0x08 /* Save Residual Byte */

Definition at line 173 of file ncr53c9xreg.h.

◆ NCRESPCFG3_T8M

#define NCRESPCFG3_T8M   0x01 /* Threshold 8 Mode */

Definition at line 176 of file ncr53c9xreg.h.

◆ NCRF9XCFG3_ADMA

#define NCRF9XCFG3_ADMA   0x02 /* Alternate DMA Mode */

Definition at line 186 of file ncr53c9xreg.h.

◆ NCRF9XCFG3_CDB

#define NCRF9XCFG3_CDB   0x20 /* CDB 10-bytes OK */

Definition at line 182 of file ncr53c9xreg.h.

◆ NCRF9XCFG3_FCLK

#define NCRF9XCFG3_FCLK   0x08 /* Fast Clock (>25Mhz) */

Definition at line 184 of file ncr53c9xreg.h.

◆ NCRF9XCFG3_FSCSI

#define NCRF9XCFG3_FSCSI   0x10 /* Fast SCSI */

Definition at line 183 of file ncr53c9xreg.h.

◆ NCRF9XCFG3_IDM

#define NCRF9XCFG3_IDM   0x80 /* ID Message Res Check */

Definition at line 180 of file ncr53c9xreg.h.

◆ NCRF9XCFG3_QTE

#define NCRF9XCFG3_QTE   0x40 /* Queue Tag Enable */

Definition at line 181 of file ncr53c9xreg.h.

◆ NCRF9XCFG3_SRESB

#define NCRF9XCFG3_SRESB   0x04 /* Save Residual Byte */

Definition at line 185 of file ncr53c9xreg.h.

◆ NCRF9XCFG3_T8M

#define NCRF9XCFG3_T8M   0x01 /* Threshold 8 Mode */

Definition at line 187 of file ncr53c9xreg.h.

◆ NCRFAS_STAT2_CACTIVE

#define NCRFAS_STAT2_CACTIVE   0x08 /* Command register is active */

Definition at line 287 of file ncr53c9xreg.h.

◆ NCRFAS_STAT2_CLATCHED

#define NCRFAS_STAT2_CLATCHED   0x04 /* Xfer cntr & recommand ctr latched */

Definition at line 286 of file ncr53c9xreg.h.

◆ NCRFAS_STAT2_EMPTY

#define NCRFAS_STAT2_EMPTY   0x80 /* FIFO is empty */

Definition at line 291 of file ncr53c9xreg.h.

◆ NCRFAS_STAT2_FLATCHED

#define NCRFAS_STAT2_FLATCHED   0x02 /* FIFO flags register latched */

Definition at line 285 of file ncr53c9xreg.h.

◆ NCRFAS_STAT2_ISHUTTLE

#define NCRFAS_STAT2_ISHUTTLE   0x20 /* FIFO Top register contains 1 byte */

Definition at line 289 of file ncr53c9xreg.h.

◆ NCRFAS_STAT2_OSHUTTLE

#define NCRFAS_STAT2_OSHUTTLE   0x40 /* next byte from FIFO is MSB */

Definition at line 290 of file ncr53c9xreg.h.

◆ NCRFAS_STAT2_SCSI16

#define NCRFAS_STAT2_SCSI16   0x10 /* SCSI interface is wide */

Definition at line 288 of file ncr53c9xreg.h.

◆ NCRFAS_STAT2_SEQCNT

#define NCRFAS_STAT2_SEQCNT   0x01 /* Sequence counter bit 7-3 enabled */

Definition at line 284 of file ncr53c9xreg.h.

◆ NCRFASCFG3_CDB10

#define NCRFASCFG3_CDB10   0x04 /* group 2 scsi-2 support */

Definition at line 195 of file ncr53c9xreg.h.

◆ NCRFASCFG3_EWIDE

#define NCRFASCFG3_EWIDE   0x40 /* Enable Wide-SCSI */

Definition at line 191 of file ncr53c9xreg.h.

◆ NCRFASCFG3_FASTCLK

#define NCRFASCFG3_FASTCLK   0x01 /* fast clock mode */

Definition at line 197 of file ncr53c9xreg.h.

◆ NCRFASCFG3_FASTSCSI

#define NCRFASCFG3_FASTSCSI   0x02 /* 10 MB/S fast scsi mode */

Definition at line 196 of file ncr53c9xreg.h.

◆ NCRFASCFG3_IDBIT3

#define NCRFASCFG3_IDBIT3   0x20 /* Bit 3 of HME SCSI-ID */

Definition at line 192 of file ncr53c9xreg.h.

◆ NCRFASCFG3_IDRESCHK

#define NCRFASCFG3_IDRESCHK   0x10 /* ID message checking */

Definition at line 193 of file ncr53c9xreg.h.

◆ NCRFASCFG3_OBAUTO

#define NCRFASCFG3_OBAUTO   0x80 /* auto push odd-byte to dma */

Definition at line 190 of file ncr53c9xreg.h.

◆ NCRFASCFG3_QUENB

#define NCRFASCFG3_QUENB   0x08 /* 3-byte msg support */

Definition at line 194 of file ncr53c9xreg.h.

◆ NCRFIFO_FF

#define NCRFIFO_FF   0x1f /* Bytes in FIFO */

Definition at line 113 of file ncr53c9xreg.h.

◆ NCRFIFO_SS

#define NCRFIFO_SS   0xe0 /* Sequence Step (Dup) */

Definition at line 112 of file ncr53c9xreg.h.

◆ NCRINTR_BS

#define NCRINTR_BS   0x10 /* Bus Service */

Definition at line 96 of file ncr53c9xreg.h.

◆ NCRINTR_DIS

#define NCRINTR_DIS   0x20 /* Disconnect */

Definition at line 95 of file ncr53c9xreg.h.

◆ NCRINTR_FC

#define NCRINTR_FC   0x08 /* Function Complete */

Definition at line 97 of file ncr53c9xreg.h.

◆ NCRINTR_ILL

#define NCRINTR_ILL   0x40 /* Illegal Command */

Definition at line 94 of file ncr53c9xreg.h.

◆ NCRINTR_RESEL

#define NCRINTR_RESEL   0x04 /* Reselected */

Definition at line 98 of file ncr53c9xreg.h.

◆ NCRINTR_SBR

#define NCRINTR_SBR   0x80 /* SCSI Bus Reset */

Definition at line 93 of file ncr53c9xreg.h.

◆ NCRINTR_SEL

#define NCRINTR_SEL   0x01 /* Selected */

Definition at line 100 of file ncr53c9xreg.h.

◆ NCRINTR_SELATN

#define NCRINTR_SELATN   0x02 /* Select with ATN */

Definition at line 99 of file ncr53c9xreg.h.

◆ NCRJMP_J0

#define NCRJMP_J0   0x01 /* Jumper #0 */

Definition at line 219 of file ncr53c9xreg.h.

◆ NCRJMP_J1

#define NCRJMP_J1   0x02 /* Jumper #1 */

Definition at line 218 of file ncr53c9xreg.h.

◆ NCRJMP_J2

#define NCRJMP_J2   0x04 /* Jumper #2 */

Definition at line 217 of file ncr53c9xreg.h.

◆ NCRJMP_J3

#define NCRJMP_J3   0x08 /* Jumper #3 */

Definition at line 216 of file ncr53c9xreg.h.

◆ NCRJMP_J4

#define NCRJMP_J4   0x10 /* Jumper #4 */

Definition at line 215 of file ncr53c9xreg.h.

◆ NCRJMP_ROMSZ

#define NCRJMP_ROMSZ   0x20 /* ROM Size 1=16K, 0=32K */

Definition at line 214 of file ncr53c9xreg.h.

◆ NCRJMP_RSVD

#define NCRJMP_RSVD   0xc0 /* reserved */

Definition at line 213 of file ncr53c9xreg.h.

◆ NCRPIOI_13

#define NCRPIOI_13   0x08 /* IRQ When 1/3 */

Definition at line 236 of file ncr53c9xreg.h.

◆ NCRPIOI_23

#define NCRPIOI_23   0x04 /* IRQ When 2/3 */

Definition at line 237 of file ncr53c9xreg.h.

◆ NCRPIOI_EMPTY

#define NCRPIOI_EMPTY   0x10 /* IRQ When Empty */

Definition at line 235 of file ncr53c9xreg.h.

◆ NCRPIOI_FINV

#define NCRPIOI_FINV   0x01 /* Flag Invert */

Definition at line 239 of file ncr53c9xreg.h.

◆ NCRPIOI_FULL

#define NCRPIOI_FULL   0x02 /* IRQ When Full */

Definition at line 238 of file ncr53c9xreg.h.

◆ NCRPIOI_RSVD

#define NCRPIOI_RSVD   0xe0 /* reserved */

Definition at line 234 of file ncr53c9xreg.h.

◆ NCRPSTAT_ATAI

#define NCRPSTAT_ATAI   0x20 /* ATA IRQ */

Definition at line 226 of file ncr53c9xreg.h.

◆ NCRPSTAT_F13

#define NCRPSTAT_F13   0x08 /* PIO FIFO 1/3 */

Definition at line 228 of file ncr53c9xreg.h.

◆ NCRPSTAT_F23

#define NCRPSTAT_F23   0x04 /* PIO FIFO 2/3 */

Definition at line 229 of file ncr53c9xreg.h.

◆ NCRPSTAT_FEMPT

#define NCRPSTAT_FEMPT   0x10 /* PIO FIFO Empty */

Definition at line 227 of file ncr53c9xreg.h.

◆ NCRPSTAT_FFULL

#define NCRPSTAT_FFULL   0x02 /* PIO FIFO Full */

Definition at line 230 of file ncr53c9xreg.h.

◆ NCRPSTAT_PERR

#define NCRPSTAT_PERR   0x80 /* PIO Error */

Definition at line 224 of file ncr53c9xreg.h.

◆ NCRPSTAT_PIOM

#define NCRPSTAT_PIOM   0x01 /* PIO/DMA Mode */

Definition at line 231 of file ncr53c9xreg.h.

◆ NCRPSTAT_SIRQ

#define NCRPSTAT_SIRQ   0x40 /* Active High of SCSI IRQ */

Definition at line 225 of file ncr53c9xreg.h.

◆ NCRSTAT_GE

#define NCRSTAT_GE   0x40 /* Gross Error */

Definition at line 82 of file ncr53c9xreg.h.

◆ NCRSTAT_INT

#define NCRSTAT_INT   0x80 /* Interrupt */

Definition at line 81 of file ncr53c9xreg.h.

◆ NCRSTAT_PE

#define NCRSTAT_PE   0x20 /* Parity Error */

Definition at line 83 of file ncr53c9xreg.h.

◆ NCRSTAT_PHASE

#define NCRSTAT_PHASE   0x07 /* Phase bits */

Definition at line 86 of file ncr53c9xreg.h.

◆ NCRSTAT_TC

#define NCRSTAT_TC   0x10 /* Terminal Count */

Definition at line 84 of file ncr53c9xreg.h.

◆ NCRSTAT_VGC

#define NCRSTAT_VGC   0x08 /* Valid Group Code */

Definition at line 85 of file ncr53c9xreg.h.

◆ NCRSTEP_DONE

#define NCRSTEP_DONE   0x04 /* command went out */

Definition at line 106 of file ncr53c9xreg.h.

◆ NCRSTEP_MASK

#define NCRSTEP_MASK   0x07 /* the last 3 bits */

Definition at line 105 of file ncr53c9xreg.h.


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