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Classes | |
struct | stic_regs |
Macros | |
#define | STAMP_CMD_POINTS (0x0000) |
#define | STAMP_CMD_LINES (0x0001) |
#define | STAMP_CMD_TRIANGLES (0x0002) |
#define | STAMP_CMD_COPYSPANS (0x0005) |
#define | STAMP_CMD_READSPANS (0x0006) |
#define | STAMP_CMD_WRITESPANS (0x0007) |
#define | STAMP_CMD_VIDEO (0x0008) |
#define | STAMP_RGB_NONE (0x0000) |
#define | STAMP_RGB_CONST (0x0010) |
#define | STAMP_RGB_FLAT (0x0020) |
#define | STAMP_RGB_SMOOTH (0x0030) |
#define | STAMP_Z_NONE (0x0000) |
#define | STAMP_Z_CONST (0x0040) |
#define | STAMP_Z_FLAT (0x0080) |
#define | STAMP_Z_SMOOTH (0x00c0) |
#define | STAMP_XY_NONE (0x0000) |
#define | STAMP_XY_PERPACKET (0x0100) |
#define | STAMP_XY_PERPRIMATIVE (0x0200) |
#define | STAMP_LW_NONE (0x0000) |
#define | STAMP_LW_PERPACKET (0x0400) |
#define | STAMP_LW_PERPRIMATIVE (0x0800) |
#define | STAMP_CLIPRECT (0x00080000) |
#define | STAMP_MESH (0x00200000) |
#define | STAMP_AALINE (0x00800000) |
#define | STAMP_HS_EQUALS (0x80000000) |
#define | STAMP_PLANE_8X3 (0 << 5) |
#define | STAMP_PLANE_24 (1 << 5) |
#define | STAMP_WE_SIGN (0x04 << 8) |
#define | STAMP_WE_XYMASK (0x02 << 8) |
#define | STAMP_WE_CLIPRECT (0x01 << 8) |
#define | STAMP_WE_NONE (0x00 << 8) |
#define | STAMP_METHOD_CLEAR (0x60 << 12) |
#define | STAMP_METHOD_AND (0x14 << 12) |
#define | STAMP_METHOD_ANDREV (0x15 << 12) |
#define | STAMP_METHOD_COPY (0x20 << 12) |
#define | STAMP_METHOD_ANDINV (0x16 << 12) |
#define | STAMP_METHOD_NOOP (0x40 << 12) |
#define | STAMP_METHOD_XOR (0x11 << 12) |
#define | STAMP_METHOD_OR (0x0f << 12) |
#define | STAMP_METHOD_NOR (0x17 << 12) |
#define | STAMP_METHOD_EQUIV (0x10 << 12) |
#define | STAMP_METHOD_INV (0x4e << 12) |
#define | STAMP_METHOD_ORREV (0x0e << 12) |
#define | STAMP_METHOD_COPYINV (0x2d << 12) |
#define | STAMP_METHOD_ORINV (0x0d << 12) |
#define | STAMP_METHOD_NAND (0x0c << 12) |
#define | STAMP_METHOD_SET (0x6c << 12) |
#define | STAMP_METHOD_SUM (0x00 << 12) |
#define | STAMP_METHOD_DIFF (0x02 << 12) |
#define | STAMP_METHOD_REVDIFF (0x01 << 12) |
#define | STAMP_DB_NONE (0x00 << 28) |
#define | STAMP_DB_01 (0x01 << 28) |
#define | STAMP_DB_12 (0x02 << 28) |
#define | STAMP_DB_02 (0x04 << 28) |
#define | STAMP_UPDATE_ENABLE (1) |
#define | STAMP_SAVE_SIGN (1<<6) |
#define | STAMP_SAVE_ALPHA (1<<7) |
#define | STAMP_SUPERSAMPLE (1<<11) |
#define | STAMP_SPAN (1<<19) |
#define | STAMP_COPYSPAN_ALIGNED (1<<20) |
#define | STAMP_MINMAX (1<<21) |
#define | STAMP_MULT (1<<22) |
#define | STAMP_MULTACC (1<<23) |
#define | STAMP_HALF_BUFF (1<27) |
#define | STAMP_INITIALIZE (1<<31) |
#define | XMASKADDR(__sx, __a) (((__a)-((__sx) % STAMP_WIDTH)) & 0xF) |
#define | YMASKADDR(__sy, __b) (((__b)-((__sy) % STAMP_HEIGHT)) & 0xF) |
#define | XYMASKADDR(_x, _y, _a, _b) (XMASKADDR(_x,_a) << 16 | YMASKADDR(_y,_b)) |
#define | STAMP_OK (0) |
#define | STAMP_BUSY (1) |
#define | STAMP_RETRIES (7000) |
#define | STAMP_DELAY (20) |
#define | __PXS(n) (n) |
#define | PX_STIC_POLL_OFFSET __PXS(0x000000) /* STIC DMA poll space */ |
#define | PX_STAMP_OFFSET __PXS(0x0c0000) /* pixelstamp space on STIC */ |
#define | PX_STIC_OFFSET __PXS(0x180000) /* STIC registers */ |
#define | PX_VDAC_OFFSET __PXS(0x200000) /* VDAC registers (bt459) */ |
#define | PX_VDAC_RESET_OFFSET __PXS(0x300000) /* VDAC reset register */ |
#define | PX_ROM_OFFSET __PXS(0x300000) /* ROM code */ |
#define | PXG_STIC_POLL_OFFSET __PXS(0x000000) /* STIC DMA poll space */ |
#define | PXG_STAMP_OFFSET __PXS(0x0c0000) /* pixelstamp space on STIC */ |
#define | PXG_STIC_OFFSET __PXS(0x180000) /* STIC registers */ |
#define | PXG_SRAM_OFFSET __PXS(0x200000) /* N10 SRAM */ |
#define | PXG_HOST_INTR_OFFSET __PXS(0x280000) /* N10 host interrupt */ |
#define | PXG_COPROC_INTR_OFFSET __PXS(0x2c0000) /* N10 coprocessor interrupt */ |
#define | PXG_VDAC_OFFSET __PXS(0x300000) /* VDAC registers (bt459) */ |
#define | PXG_VDAC_RESET_OFFSET __PXS(0x340000) /* VDAC reset register */ |
#define | PXG_ROM_OFFSET __PXS(0x380000) /* ROM code */ |
#define | PXG_N10_START_OFFSET __PXS(0x380000) /* N10 start register */ |
#define | PXG_N10_RESET_OFFSET __PXS(0x3c0000) /* N10 reset (stop?) register */ |
#define | STIC_CSR_TSTFNC 0x00000003 |
#define | STIC_CSR_TSTFNC_NORMAL 0 |
#define | STIC_CSR_TSTFNC_PARITY 1 |
#define | STIC_CSR_TSTFNC_CNTPIX 2 |
#define | STIC_CSR_TSTFNC_TSTDAC 3 |
#define | STIC_CSR_CHECKPAR 0x00000004 |
#define | STIC_CSR_STARTVT 0x00000010 |
#define | STIC_CSR_START 0x00000020 |
#define | STIC_CSR_RESET 0x00000040 |
#define | STIC_CSR_STARTST 0x00000080 |
#define | STIC_INT_E_EN 0x00000001 |
#define | STIC_INT_E 0x00000002 |
#define | STIC_INT_E_WE 0x00000004 |
#define | STIC_INT_V_EN 0x00000100 |
#define | STIC_INT_V 0x00000200 |
#define | STIC_INT_V_WE 0x00000400 |
#define | STIC_INT_P_EN 0x00010000 |
#define | STIC_INT_P 0x00020000 |
#define | STIC_INT_P_WE 0x00040000 |
#define | STIC_INT_E_MASK (STIC_INT_E_EN | STIC_INT_E | STIC_INT_E_WE) |
#define | STIC_INT_V_MASK (STIC_INT_V_EN | STIC_INT_V | STIC_INT_V_WE) |
#define | STIC_INT_P_MASK (STIC_INT_P_EN | STIC_INT_P | STIC_INT_P_WE) |
#define | STIC_INT_MASK (STIC_INT_E_MASK | STIC_INT_P_MASK | STIC_INT_V_MASK) |
#define | STIC_INT_WE (STIC_INT_E_WE | STIC_INT_V_WE | STIC_INT_P_WE) |
#define | STIC_INT_CLR (STIC_INT_E_EN | STIC_INT_V_EN | STIC_INT_P_EN) |
#define PX_STAMP_OFFSET __PXS(0x0c0000) /* pixelstamp space on STIC */ |
#define PX_STIC_POLL_OFFSET __PXS(0x000000) /* STIC DMA poll space */ |
#define PX_VDAC_OFFSET __PXS(0x200000) /* VDAC registers (bt459) */ |
#define PX_VDAC_RESET_OFFSET __PXS(0x300000) /* VDAC reset register */ |
#define PXG_N10_RESET_OFFSET __PXS(0x3c0000) /* N10 reset (stop?) register */ |
#define PXG_N10_START_OFFSET __PXS(0x380000) /* N10 start register */ |
#define PXG_STAMP_OFFSET __PXS(0x0c0000) /* pixelstamp space on STIC */ |
#define PXG_STIC_OFFSET __PXS(0x180000) /* STIC registers */ |
#define PXG_STIC_POLL_OFFSET __PXS(0x000000) /* STIC DMA poll space */ |
#define PXG_VDAC_OFFSET __PXS(0x300000) /* VDAC registers (bt459) */ |
#define PXG_VDAC_RESET_OFFSET __PXS(0x340000) /* VDAC reset register */ |
#define STIC_INT_CLR (STIC_INT_E_EN | STIC_INT_V_EN | STIC_INT_P_EN) |
#define STIC_INT_E_MASK (STIC_INT_E_EN | STIC_INT_E | STIC_INT_E_WE) |
#define STIC_INT_MASK (STIC_INT_E_MASK | STIC_INT_P_MASK | STIC_INT_V_MASK) |
#define STIC_INT_P_MASK (STIC_INT_P_EN | STIC_INT_P | STIC_INT_P_WE) |
#define STIC_INT_V_MASK (STIC_INT_V_EN | STIC_INT_V | STIC_INT_V_WE) |
#define STIC_INT_WE (STIC_INT_E_WE | STIC_INT_V_WE | STIC_INT_P_WE) |
#define XMASKADDR | ( | __sx, | |
__a | |||
) | (((__a)-((__sx) % STAMP_WIDTH)) & 0xF) |