#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "cpu.h"
#include "devices.h"
#include "interrupt.h"
#include "memory.h"
#include "misc.h"
#include "thirdparty/dec_kn03.h"
#include "thirdparty/tc_ioasicreg.h"
Go to the source code of this file.
Macros | |
#define | IOASIC_DEBUG |
Functions | |
void | dec_ioasic_reassert (struct dec_ioasic_data *d) |
DEVICE_ACCESS (dec_ioasic) | |
struct dec_ioasic_data * | dev_dec_ioasic_init (struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag, struct interrupt *irqp) |
#define IOASIC_DEBUG |
Definition at line 47 of file dev_dec_ioasic.cc.
void dec_ioasic_reassert | ( | struct dec_ioasic_data * | d | ) |
Definition at line 51 of file dev_dec_ioasic.cc.
References dec_ioasic_data::imsk, dec_ioasic_data::int_asserted, interrupt::interrupt_assert, interrupt::interrupt_deassert, dec_ioasic_data::intr, and dec_ioasic_data::irq.
Referenced by DEVICE_ACCESS(), kn02ba_interrupt_assert(), and kn02ba_interrupt_deassert().
struct dec_ioasic_data* dev_dec_ioasic_init | ( | struct cpu * | cpu, |
struct memory * | mem, | ||
uint64_t | baseaddr, | ||
int | rackmount_flag, | ||
struct interrupt * | irqp | ||
) |
Definition at line 460 of file dev_dec_ioasic.cc.
References CHECK_ALLOCATION, dev_dec_ioasic_access(), DEV_DEC_IOASIC_LENGTH, DM_DEFAULT, dec_ioasic_data::irq, memory_device_register(), and dec_ioasic_data::rackmount_flag.
Referenced by DEVINIT().
DEVICE_ACCESS | ( | dec_ioasic | ) |
Definition at line 66 of file dev_dec_ioasic.cc.
References csr, dec_ioasic_data::csr, data, debug, dec_ioasic_reassert(), dec_ioasic_data::dma_func, dec_ioasic_data::dma_func_extra, fatal(), dec_ioasic_data::floppy_decode, dec_ioasic_data::floppy_dmaptr, dec_ioasic_data::imsk, dec_ioasic_data::intr, IOASIC_CSR, IOASIC_CSR_DMAEN_R2, IOASIC_CSR_DMAEN_T2, IOASIC_FLOPPY_DECODE, IOASIC_FLOPPY_DMAPTR, IOASIC_IMSK, IOASIC_INTR, IOASIC_INTR_R2_HALF_PAGE, IOASIC_INTR_T2_PAGE_END, IOASIC_ISDN_R_DATA, IOASIC_ISDN_R_DMAPTR, IOASIC_ISDN_R_NEXTPTR, IOASIC_ISDN_X_DATA, IOASIC_ISDN_X_DMAPTR, IOASIC_ISDN_X_NEXTPTR, IOASIC_LANCE_DECODE, IOASIC_LANCE_DMAPTR, IOASIC_SCC0_DECODE, IOASIC_SCC1_DECODE, IOASIC_SCC_R2_DMAPTR, IOASIC_SCC_T2_DMAPTR, IOASIC_SCSI_DECODE, IOASIC_SCSI_DMAPTR, IOASIC_SCSI_NEXTPTR, IOASIC_SCSI_SCR, IOASIC_SCSI_SDR0, IOASIC_SCSI_SDR1, IOASIC_SLOT_1_START, IOASIC_SYS_ETHER_ADDRESS, dec_ioasic_data::isdn_r_data, dec_ioasic_data::isdn_r_dmaptr, dec_ioasic_data::isdn_r_nextptr, dec_ioasic_data::isdn_x_data, dec_ioasic_data::isdn_x_dmaptr, dec_ioasic_data::isdn_x_nextptr, dec_ioasic_data::lance_decode, dec_ioasic_data::lance_dmaptr, MEM_READ, MEM_WRITE, memory_readmax64(), memory_writemax64(), dec_ioasic_data::scc0_decode, dec_ioasic_data::scc1_decode, dec_ioasic_data::scsi_decode, dec_ioasic_data::scsi_dmaptr, dec_ioasic_data::scsi_nextptr, dec_ioasic_data::scsi_scr, dec_ioasic_data::scsi_sdr0, and dec_ioasic_data::scsi_sdr1.