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Macros | |
#define | SH3_BCR1 0xffffff60 /* 16bit */ |
#define | SH3_BCR2 0xffffff62 /* 16bit */ |
#define | SH3_WCR1 0xffffff64 /* 16bit */ |
#define | SH3_WCR2 0xffffff66 /* 16bit */ |
#define | SH3_MCR 0xffffff68 /* 16bit */ |
#define | SH3_DCR 0xffffff6a /* 16bit */ |
#define | SH3_PCR 0xffffff6c /* 16bit */ |
#define | SH3_RTCSR 0xffffff6e /* 16bit */ |
#define | SH3_RTCNT 0xffffff70 /* 16bit */ |
#define | SH3_RTCOR 0xffffff72 /* 16bit */ |
#define | SH3_RFCR 0xffffff74 /* 16bit */ |
#define | SH3_BCR3 0xffffff7e /* 16bit */ |
#define | SH4_BCR1 0xff800000 /* 32bit */ |
#define | SH4_BCR2 0xff800004 /* 16bit */ |
#define | SH4_WCR1 0xff800008 /* 32bit */ |
#define | SH4_WCR2 0xff80000c /* 32bit */ |
#define | SH4_WCR3 0xff800010 /* 32bit */ |
#define | SH4_MCR 0xff800014 /* 32bit */ |
#define | SH4_PCR 0xff800018 /* 16bit */ |
#define | SH4_RTCSR 0xff80001c /* 16bit */ |
#define | SH4_RTCNT 0xff800020 /* 16bit */ |
#define | SH4_RTCOR 0xff800024 /* 16bit */ |
#define | SH4_RFCR 0xff800028 /* 16bit */ |
#define | SH4_PCTRA 0xff80002c /* ??? */ |
#define | SH4_PDTRA 0xff800030 /* ??? */ |
#define | SH4_PCTRB 0xff800040 /* ??? */ |
#define | SH4_PDTRB 0xff800044 /* ??? */ |
#define | SH4_GPIOIC 0xff800048 /* ??? */ |
#define | SH4_BCR3 0xff800050 /* 16bit: SH7751R */ |
#define | SH4_BCR4 0xfe0a00f0 /* 32bit: SH7751R */ |
#define | BCR1_LITTLE_ENDIAN (1 << 31) |
#define | BCR1_MASTER (1 << 30) |
#define | BCR1_BREQEN (1 << 19) |
#define | BCR2_PORTEN (1 << 0) |
#define | RTCSR_CMF (1 << 7) |
#define | RTCSR_CMIE (1 << 6) |
#define | RTCSR_CKS 0x0038 |
#define | RTCSR_OVF (1 << 2) |
#define | RTCSR_OVIE (1 << 1) |
#define | RTCSR_LMTS (1 << 0) |
#define BCR1_BREQEN (1 << 19) |
Definition at line 75 of file sh4_bscreg.h.
#define BCR1_LITTLE_ENDIAN (1 << 31) |
Definition at line 73 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define BCR1_MASTER (1 << 30) |
Definition at line 74 of file sh4_bscreg.h.
#define BCR2_PORTEN (1 << 0) |
Definition at line 77 of file sh4_bscreg.h.
Referenced by DEVINIT().
#define RTCSR_CKS 0x0038 |
Definition at line 81 of file sh4_bscreg.h.
#define RTCSR_CMF (1 << 7) |
Definition at line 79 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define RTCSR_CMIE (1 << 6) |
Definition at line 80 of file sh4_bscreg.h.
#define RTCSR_LMTS (1 << 0) |
Definition at line 84 of file sh4_bscreg.h.
#define RTCSR_OVF (1 << 2) |
Definition at line 82 of file sh4_bscreg.h.
#define RTCSR_OVIE (1 << 1) |
Definition at line 83 of file sh4_bscreg.h.
#define SH3_BCR1 0xffffff60 /* 16bit */ |
Definition at line 41 of file sh4_bscreg.h.
#define SH3_BCR2 0xffffff62 /* 16bit */ |
Definition at line 42 of file sh4_bscreg.h.
#define SH3_BCR3 0xffffff7e /* 16bit */ |
Definition at line 52 of file sh4_bscreg.h.
#define SH3_DCR 0xffffff6a /* 16bit */ |
Definition at line 46 of file sh4_bscreg.h.
#define SH3_MCR 0xffffff68 /* 16bit */ |
Definition at line 45 of file sh4_bscreg.h.
#define SH3_PCR 0xffffff6c /* 16bit */ |
Definition at line 47 of file sh4_bscreg.h.
#define SH3_RFCR 0xffffff74 /* 16bit */ |
Definition at line 51 of file sh4_bscreg.h.
#define SH3_RTCNT 0xffffff70 /* 16bit */ |
Definition at line 49 of file sh4_bscreg.h.
#define SH3_RTCOR 0xffffff72 /* 16bit */ |
Definition at line 50 of file sh4_bscreg.h.
#define SH3_RTCSR 0xffffff6e /* 16bit */ |
Definition at line 48 of file sh4_bscreg.h.
#define SH3_WCR1 0xffffff64 /* 16bit */ |
Definition at line 43 of file sh4_bscreg.h.
#define SH3_WCR2 0xffffff66 /* 16bit */ |
Definition at line 44 of file sh4_bscreg.h.
#define SH4_BCR1 0xff800000 /* 32bit */ |
Definition at line 54 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_BCR2 0xff800004 /* 16bit */ |
Definition at line 55 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_BCR3 0xff800050 /* 16bit: SH7751R */ |
Definition at line 70 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_BCR4 0xfe0a00f0 /* 32bit: SH7751R */ |
Definition at line 71 of file sh4_bscreg.h.
#define SH4_GPIOIC 0xff800048 /* ??? */ |
Definition at line 69 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_MCR 0xff800014 /* 32bit */ |
Definition at line 59 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_PCR 0xff800018 /* 16bit */ |
Definition at line 60 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_PCTRA 0xff80002c /* ??? */ |
Definition at line 65 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_PCTRB 0xff800040 /* ??? */ |
Definition at line 67 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_PDTRA 0xff800030 /* ??? */ |
Definition at line 66 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_PDTRB 0xff800044 /* ??? */ |
Definition at line 68 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_RFCR 0xff800028 /* 16bit */ |
Definition at line 64 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_RTCNT 0xff800020 /* 16bit */ |
Definition at line 62 of file sh4_bscreg.h.
#define SH4_RTCOR 0xff800024 /* 16bit */ |
Definition at line 63 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_RTCSR 0xff80001c /* 16bit */ |
Definition at line 61 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_WCR1 0xff800008 /* 32bit */ |
Definition at line 56 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_WCR2 0xff80000c /* 32bit */ |
Definition at line 57 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().
#define SH4_WCR3 0xff800010 /* 32bit */ |
Definition at line 58 of file sh4_bscreg.h.
Referenced by DEVICE_ACCESS().