42 #ifdef LS_INCLUDE_GENERIC 52 int low_pc = ((
size_t)ic - (size_t)cpu->
cd.
mips.cur_ic_page)
53 /
sizeof(
struct mips_instr_call);
70 fatal(
"{ mips dyntrans alignment exception, size = %i," 71 " addr = %016"PRIx64
", pc = %016"PRIx64
" }\n",
LS_SIZE,
72 (uint64_t) addr, cpu->
pc);
77 cpu->
cd.
mips.next_ic = ¬hing_call;
114 void LS_N(
struct cpu *cpu,
struct mips_instr_call *ic)
120 p = cpu->
cd.
mips.host_load[addr >> 12];
122 p = cpu->
cd.
mips.host_store[addr >> 12];
137 l2 = cpu->
cd.DYNTRANS_ARCH.l1_64[x1];
142 p = l3->host_load[x3];
144 p = l3->host_store[x3];
177 #ifdef HOST_BIG_ENDIAN
178 ( *(uint16_t *)(p +
addr) );
180 ((p[
addr]<<8) + p[addr+1]);
183 #ifdef HOST_LITTLE_ENDIAN 184 ( *(uint16_t *)(p + addr) );
186 (p[
addr] + (p[addr+1]<<8));
199 #ifdef HOST_BIG_ENDIAN 200 ( *(uint32_t *)(p + addr) );
202 ((p[
addr]<<24) + (p[addr+1]<<16) + (p[addr+2]<<8) + p[addr+3]);
205 #ifdef HOST_LITTLE_ENDIAN 206 ( *(uint32_t *)(p + addr) );
208 (p[
addr] + (p[addr+1]<<8) + (p[addr+2]<<16) + (p[addr+3]<<24));
214 *((uint64_t *)ic->arg[0]) =
216 #ifdef HOST_BIG_ENDIAN 217 ( *(uint64_t *)(p + addr) );
219 ((uint64_t)p[addr] << 56) + ((uint64_t)p[addr+1] << 48) +
220 ((uint64_t)p[addr+2] << 40) + ((uint64_t)p[addr+3] << 32) +
221 ((uint64_t)p[addr+4] << 24) +
222 (p[addr+5] << 16) + (p[addr+6] << 8) + p[addr+7];
225 #ifdef HOST_LITTLE_ENDIAN 226 ( *(uint64_t *)(p + addr) );
228 p[addr+0] + (p[addr+1] << 8) + (p[addr+2] << 16) +
229 ((uint64_t)p[addr+3] << 24) + ((uint64_t)p[addr+4] << 32) +
230 ((uint64_t)p[addr+5] << 40) + ((uint64_t)p[addr+6] << 48) +
231 ((uint64_t)p[addr+7] << 56);
243 { uint32_t x =
reg(ic->arg[0]);
245 #ifdef HOST_BIG_ENDIAN 246 *((uint16_t *)(p+addr)) = x; }
248 p[
addr] = x >> 8; p[addr+1] = x; }
251 #ifdef HOST_LITTLE_ENDIAN 252 *((uint16_t *)(p+addr)) = x; }
254 p[
addr] = x; p[addr+1] = x >> 8; }
259 { uint32_t x =
reg(ic->arg[0]);
261 #ifdef HOST_BIG_ENDIAN 262 *((uint32_t *)(p+addr)) = x; }
264 p[
addr] = x >> 24; p[addr+1] = x >> 16;
265 p[addr+2] = x >> 8; p[addr+3] = x; }
268 #ifdef HOST_LITTLE_ENDIAN 269 *((uint32_t *)(p+addr)) = x; }
271 p[
addr] = x; p[addr+1] = x >> 8;
272 p[addr+2] = x >> 16; p[addr+3] = x >> 24; }
277 { uint64_t x = *(uint64_t *)(ic->arg[0]);
279 #ifdef HOST_BIG_ENDIAN 280 *((uint64_t *)(p+addr)) = x; }
282 p[
addr] = x >> 56; p[addr+1] = x >> 48; p[addr+2] = x >> 40;
283 p[addr+3] = x >> 32; p[addr+4] = x >> 24; p[addr+5] = x >> 16;
284 p[addr+6] = x >> 8; p[addr+7] = x; }
287 #ifdef HOST_LITTLE_ENDIAN 288 *((uint64_t *)(p+
addr)) = x; }
291 p[
addr+3] = x >> 24; p[
addr+4] = x >> 32; p[
addr+5] = x >> 40;
292 p[
addr+6] = x >> 48; p[
addr+7] = x >> 56; }
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
void fatal(const char *fmt,...)
struct arm_instr_call * ic
#define DYNTRANS_L2_64_TABLE
void LS_N(struct cpu *cpu, struct mips_instr_call *ic)
int debugger_n_steps_left_before_interaction
#define MIPS_INSTR_ALIGNMENT_SHIFT
int(* memory_rw)(struct cpu *cpu, struct memory *mem, uint64_t vaddr, unsigned char *data, size_t len, int writeflag, int cache_flags)
void LS_GENERIC_N(struct cpu *cpu, struct ppc_instr_call *ic)
void mips_cpu_exception(struct cpu *cpu, int exccode, int tlb, uint64_t vaddr, int coproc_nr, uint64_t vaddr_vpn2, int vaddr_asid, int x_64)
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len, uint64_t data)
#define DYNTRANS_L3_64_TABLE
#define MIPS_IC_ENTRIES_PER_PAGE