61 uint64_t idata = 0, odata = 0;
69 switch (relative_addr) {
87 if (((++ x) & 0xffff) == 0)
174 default:
if (writeflag ==
MEM_READ) {
175 fatal(
"[ algor: read from 0x%x ]\n",
178 fatal(
"[ algor: write to 0x%x: 0x%" PRIx64
" ]\n",
179 (
int) relative_addr, (uint64_t) idata);
185 debug(
"[ algor: read from %s: 0x%" PRIx64
" ]\n",
186 n, (uint64_t) odata);
188 debug(
"[ algor: write to %s: 0x%" PRIx64
" ]\n",
189 n, (uint64_t) idata);
210 fatal(
"The Algor base address should be 0x1ff00000.\n");
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
void fatal(const char *fmt,...)
struct interrupt mips_irq_4
struct interrupt mips_irq_2
struct isa_pic_data isa_pic_data
#define CHECK_ALLOCATION(ptr)
struct pic8259_data * pic1
#define INTERRUPT_CONNECT(name, istruct)
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len, uint64_t data)
void memory_device_register(struct memory *mem, const char *, uint64_t baseaddr, uint64_t len, int(*f)(struct cpu *, struct memory *, uint64_t, unsigned char *, size_t, int, void *), void *extra, int flags, unsigned char *dyntrans_data)
struct interrupt mips_irq_3
struct pic8259_data * pic2
#define INTERRUPT_DEASSERT(istruct)