50 #define DA1I_vSCCWrReq 0x80 51 #define DA1O_vPage2 0x40 52 #define DA1I_CPU_ID1 0x40 53 #define DA1O_vHeadSel 0x20 54 #define DA1O_vOverlay 0x10 55 #define DA1O_vSync 0x08 56 #define DA1O_RESERVED2 0x04 57 #define DA1O_RESERVED1 0x02 58 #define DA1O_RESERVED0 0x01 61 #define DB1I_Par_Err 0x80 62 #define DB1O_vSndEnb 0x80 63 #define DB1O_Par_Enb 0x40 64 #define DB1O_vFDesk2 0x20 65 #define DB1O_vFDesk1 0x10 66 #define DB1I_vFDBInt 0x08 67 #define DB1O_rTCEnb 0x04 68 #define DB1O_rTCCLK 0x02 69 #define DB1O_rTCData 0x01 70 #define DB1I_rTCData 0x01 73 #define DA2O_v2Ram1 0x80 74 #define DA2O_v2Ram0 0x40 75 #define DA2I_v2IRQ0 0x40 76 #define DA2I_v2IRQE 0x20 77 #define DA2I_v2IRQD 0x10 78 #define DA2I_v2IRQC 0x08 79 #define DA2I_v2IRQB 0x04 80 #define DA2I_v2IRQA 0x02 81 #define DA2I_v2IRQ9 0x01 84 #define DB2O_v2VBL 0x80 85 #define DB2O_Par_Test 0x80 86 #define DB2I_v2SNDEXT 0x40 87 #define DB2I_v2TM0A 0x20 88 #define DB2I_v2TM1A 0x10 89 #define DB2I_vFC3 0x08 90 #define DB2O_vFC3 0x08 91 #define DB2O_v2PowerOff 0x04 92 #define DB2O_v2BusLk 0x02 93 #define DB2O_vCDis 0x01 94 #define DB2O_CEnable 0x01 101 #define VIA1_ADBCLK 4 102 #define VIA1_ADBDATA 3 103 #define VIA1_ADBRDY 2 105 #define VIA1_ONESEC 0 108 #define V1IF_IRQ 0x80 109 #define V1IF_T1 (1 << VIA1_T1) 110 #define V1IF_T2 (1 << VIA1_T2) 111 #define V1IF_ADBCLK (1 << VIA1_ADBCLK) 112 #define V1IF_ADBDATA (1 << VIA1_ADBDATA) 113 #define V1IF_ADBRDY (1 << VIA1_ADBRDY) 114 #define V1IF_VBLNK (1 << VIA1_VBLNK) 115 #define V1IF_ONESEC (1 << VIA1_ONESEC) 123 #define VIA2_SCSIIRQ 3 124 #define VIA2_EXPIRQ 2 125 #define VIA2_SLOTINT 1 126 #define VIA2_SCSIDRQ 0 129 #define V2IF_IRQ 0x80 130 #define V2IF_T1 (1 << VIA2_T1) 131 #define V2IF_T2 (1 << VIA2_T2) 132 #define V2IF_ASC (1 << VIA2_ASC) 133 #define V2IF_SCSIIRQ (1 << VIA2_SCSIIRQ) 134 #define V2IF_EXPIRQ (1 << VIA2_EXPIRQ) 135 #define V2IF_SLOTINT (1 << VIA2_SLOTINT) 136 #define V2IF_SCSIDRQ (1 << VIA2_SCSIDRQ) 138 #define VIA1_INTS (V1IF_T1 | V1IF_ADBRDY) 139 #define VIA2_INTS (V2IF_T1 | V2IF_ASC | V2IF_SCSIIRQ | V2IF_SLOTINT | \ 142 #define RBV_INTS (V2IF_T1 | V2IF_ASC | V2IF_SCSIIRQ | V2IF_SLOTINT | \ 143 V2IF_SCSIDRQ | V1IF_ADBRDY) 145 #define ACR_T1LATCH 0x40 148 extern volatile unsigned char *Via1Base;
150 #define VIA1_addr Via1Base 179 #define rMonitor 0x10 180 #define rSlotInt 0x12 183 #define RBVDepthMask 0x07 184 #define RBVMonitorMask 0x38 186 #define RBVMonIDNone 0x38 187 #define RBVMonIDOff 0x0 188 #define RBVMonID15BWP 0x08 189 #define RBVMonIDRGB 0x10 190 #define RBVMonIDRGB15 0x28 191 #define RBVMonIDBW 0x30 193 #define via_reg(v, r) (*(Via1Base + (r))) 196 #include <machine/pio.h> 198 static __inline
void via_reg_and(
int,
int,
int);
199 static __inline
void via_reg_or(
int,
int,
int);
200 static __inline
void via_reg_xor(
int,
int,
int);
201 static __inline
void write_via_reg(
int,
int,
int);
202 static __inline
int read_via_reg(
int,
int);
205 via_reg_and(ign,
reg, val)
208 volatile unsigned char *
addr = Via1Base +
reg;
210 out8(addr, in8(addr) & val);
214 via_reg_or(ign, reg, val)
217 volatile unsigned char *addr = Via1Base +
reg;
219 out8(addr, in8(addr) | val);
223 via_reg_xor(ign, reg, val)
226 volatile unsigned char *addr = Via1Base +
reg;
228 out8(addr, in8(addr) ^ val);
232 read_via_reg(ign, reg)
235 volatile unsigned char *addr = Via1Base +
reg;
241 write_via_reg(ign, reg, val)
244 volatile unsigned char *addr = Via1Base +
reg;
251 #define vDirA_ADBState 0x30 253 void via_init
__P((
void));
254 int rbv_vidstatus
__P((
void));
255 void via_shutdown
__P((
void));
256 void via_set_modem
__P((
int));
257 int add_nubus_intr
__P((
int,
void (*)
__P((
void *,
int)),
void *));
258 void enable_nubus_intr
__P((
void));
259 void via1_register_irq
__P((
int,
void (*)(
void *),
void *));
260 void via2_register_irq
__P((
int,
void (*)(
void *),
void *));
262 extern void (*via1itab[7])
__P((
void *));
263 extern void (*via2itab[7])
__P((
void *));