tmp_arm_loadstore_p0_u1_w0.cc File Reference

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tmp_arm_loadstore_p0_u1_w0.cc File Reference
#include <stdio.h>
#include <stdlib.h>
#include "cpu.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"
#include "quick_pc_to_pointers.h"
#include "cpu_arm_instr_loadstore.cc"

Go to the source code of this file.

Macros

#define DYNTRANS_PC_TO_POINTERS   arm_pc_to_pointers
 
#define reg(x)   (*((uint32_t *)(x)))
 
#define A__NAME__general   arm_instr_store_w0_word_u1_p0_imm__general
 
#define A__NAME   arm_instr_store_w0_word_u1_p0_imm
 
#define A__NAME__eq   arm_instr_store_w0_word_u1_p0_imm__eq
 
#define A__NAME__ne   arm_instr_store_w0_word_u1_p0_imm__ne
 
#define A__NAME__cs   arm_instr_store_w0_word_u1_p0_imm__cs
 
#define A__NAME__cc   arm_instr_store_w0_word_u1_p0_imm__cc
 
#define A__NAME__mi   arm_instr_store_w0_word_u1_p0_imm__mi
 
#define A__NAME__pl   arm_instr_store_w0_word_u1_p0_imm__pl
 
#define A__NAME__vs   arm_instr_store_w0_word_u1_p0_imm__vs
 
#define A__NAME__vc   arm_instr_store_w0_word_u1_p0_imm__vc
 
#define A__NAME__hi   arm_instr_store_w0_word_u1_p0_imm__hi
 
#define A__NAME__ls   arm_instr_store_w0_word_u1_p0_imm__ls
 
#define A__NAME__ge   arm_instr_store_w0_word_u1_p0_imm__ge
 
#define A__NAME__lt   arm_instr_store_w0_word_u1_p0_imm__lt
 
#define A__NAME__gt   arm_instr_store_w0_word_u1_p0_imm__gt
 
#define A__NAME__le   arm_instr_store_w0_word_u1_p0_imm__le
 
#define A__NAME_PC   arm_instr_store_w0_word_u1_p0_imm_pc
 
#define A__NAME_PC__eq   arm_instr_store_w0_word_u1_p0_imm_pc__eq
 
#define A__NAME_PC__ne   arm_instr_store_w0_word_u1_p0_imm_pc__ne
 
#define A__NAME_PC__cs   arm_instr_store_w0_word_u1_p0_imm_pc__cs
 
#define A__NAME_PC__cc   arm_instr_store_w0_word_u1_p0_imm_pc__cc
 
#define A__NAME_PC__mi   arm_instr_store_w0_word_u1_p0_imm_pc__mi
 
#define A__NAME_PC__pl   arm_instr_store_w0_word_u1_p0_imm_pc__pl
 
#define A__NAME_PC__vs   arm_instr_store_w0_word_u1_p0_imm_pc__vs
 
#define A__NAME_PC__vc   arm_instr_store_w0_word_u1_p0_imm_pc__vc
 
#define A__NAME_PC__hi   arm_instr_store_w0_word_u1_p0_imm_pc__hi
 
#define A__NAME_PC__ls   arm_instr_store_w0_word_u1_p0_imm_pc__ls
 
#define A__NAME_PC__ge   arm_instr_store_w0_word_u1_p0_imm_pc__ge
 
#define A__NAME_PC__lt   arm_instr_store_w0_word_u1_p0_imm_pc__lt
 
#define A__NAME_PC__gt   arm_instr_store_w0_word_u1_p0_imm_pc__gt
 
#define A__NAME_PC__le   arm_instr_store_w0_word_u1_p0_imm_pc__le
 
#define A__U
 
#define A__NAME__general   arm_instr_load_w0_word_u1_p0_imm__general
 
#define A__NAME   arm_instr_load_w0_word_u1_p0_imm
 
#define A__NAME__eq   arm_instr_load_w0_word_u1_p0_imm__eq
 
#define A__NAME__ne   arm_instr_load_w0_word_u1_p0_imm__ne
 
#define A__NAME__cs   arm_instr_load_w0_word_u1_p0_imm__cs
 
#define A__NAME__cc   arm_instr_load_w0_word_u1_p0_imm__cc
 
#define A__NAME__mi   arm_instr_load_w0_word_u1_p0_imm__mi
 
#define A__NAME__pl   arm_instr_load_w0_word_u1_p0_imm__pl
 
#define A__NAME__vs   arm_instr_load_w0_word_u1_p0_imm__vs
 
#define A__NAME__vc   arm_instr_load_w0_word_u1_p0_imm__vc
 
#define A__NAME__hi   arm_instr_load_w0_word_u1_p0_imm__hi
 
#define A__NAME__ls   arm_instr_load_w0_word_u1_p0_imm__ls
 
#define A__NAME__ge   arm_instr_load_w0_word_u1_p0_imm__ge
 
#define A__NAME__lt   arm_instr_load_w0_word_u1_p0_imm__lt
 
#define A__NAME__gt   arm_instr_load_w0_word_u1_p0_imm__gt
 
#define A__NAME__le   arm_instr_load_w0_word_u1_p0_imm__le
 
#define A__NAME_PC   arm_instr_load_w0_word_u1_p0_imm_pc
 
#define A__NAME_PC__eq   arm_instr_load_w0_word_u1_p0_imm_pc__eq
 
#define A__NAME_PC__ne   arm_instr_load_w0_word_u1_p0_imm_pc__ne
 
#define A__NAME_PC__cs   arm_instr_load_w0_word_u1_p0_imm_pc__cs
 
#define A__NAME_PC__cc   arm_instr_load_w0_word_u1_p0_imm_pc__cc
 
#define A__NAME_PC__mi   arm_instr_load_w0_word_u1_p0_imm_pc__mi
 
#define A__NAME_PC__pl   arm_instr_load_w0_word_u1_p0_imm_pc__pl
 
#define A__NAME_PC__vs   arm_instr_load_w0_word_u1_p0_imm_pc__vs
 
#define A__NAME_PC__vc   arm_instr_load_w0_word_u1_p0_imm_pc__vc
 
#define A__NAME_PC__hi   arm_instr_load_w0_word_u1_p0_imm_pc__hi
 
#define A__NAME_PC__ls   arm_instr_load_w0_word_u1_p0_imm_pc__ls
 
#define A__NAME_PC__ge   arm_instr_load_w0_word_u1_p0_imm_pc__ge
 
#define A__NAME_PC__lt   arm_instr_load_w0_word_u1_p0_imm_pc__lt
 
#define A__NAME_PC__gt   arm_instr_load_w0_word_u1_p0_imm_pc__gt
 
#define A__NAME_PC__le   arm_instr_load_w0_word_u1_p0_imm_pc__le
 
#define A__L
 
#define A__U
 
#define A__NAME__general   arm_instr_store_w0_byte_u1_p0_imm__general
 
#define A__NAME   arm_instr_store_w0_byte_u1_p0_imm
 
#define A__NAME__eq   arm_instr_store_w0_byte_u1_p0_imm__eq
 
#define A__NAME__ne   arm_instr_store_w0_byte_u1_p0_imm__ne
 
#define A__NAME__cs   arm_instr_store_w0_byte_u1_p0_imm__cs
 
#define A__NAME__cc   arm_instr_store_w0_byte_u1_p0_imm__cc
 
#define A__NAME__mi   arm_instr_store_w0_byte_u1_p0_imm__mi
 
#define A__NAME__pl   arm_instr_store_w0_byte_u1_p0_imm__pl
 
#define A__NAME__vs   arm_instr_store_w0_byte_u1_p0_imm__vs
 
#define A__NAME__vc   arm_instr_store_w0_byte_u1_p0_imm__vc
 
#define A__NAME__hi   arm_instr_store_w0_byte_u1_p0_imm__hi
 
#define A__NAME__ls   arm_instr_store_w0_byte_u1_p0_imm__ls
 
#define A__NAME__ge   arm_instr_store_w0_byte_u1_p0_imm__ge
 
#define A__NAME__lt   arm_instr_store_w0_byte_u1_p0_imm__lt
 
#define A__NAME__gt   arm_instr_store_w0_byte_u1_p0_imm__gt
 
#define A__NAME__le   arm_instr_store_w0_byte_u1_p0_imm__le
 
#define A__NAME_PC   arm_instr_store_w0_byte_u1_p0_imm_pc
 
#define A__NAME_PC__eq   arm_instr_store_w0_byte_u1_p0_imm_pc__eq
 
#define A__NAME_PC__ne   arm_instr_store_w0_byte_u1_p0_imm_pc__ne
 
#define A__NAME_PC__cs   arm_instr_store_w0_byte_u1_p0_imm_pc__cs
 
#define A__NAME_PC__cc   arm_instr_store_w0_byte_u1_p0_imm_pc__cc
 
#define A__NAME_PC__mi   arm_instr_store_w0_byte_u1_p0_imm_pc__mi
 
#define A__NAME_PC__pl   arm_instr_store_w0_byte_u1_p0_imm_pc__pl
 
#define A__NAME_PC__vs   arm_instr_store_w0_byte_u1_p0_imm_pc__vs
 
#define A__NAME_PC__vc   arm_instr_store_w0_byte_u1_p0_imm_pc__vc
 
#define A__NAME_PC__hi   arm_instr_store_w0_byte_u1_p0_imm_pc__hi
 
#define A__NAME_PC__ls   arm_instr_store_w0_byte_u1_p0_imm_pc__ls
 
#define A__NAME_PC__ge   arm_instr_store_w0_byte_u1_p0_imm_pc__ge
 
#define A__NAME_PC__lt   arm_instr_store_w0_byte_u1_p0_imm_pc__lt
 
#define A__NAME_PC__gt   arm_instr_store_w0_byte_u1_p0_imm_pc__gt
 
#define A__NAME_PC__le   arm_instr_store_w0_byte_u1_p0_imm_pc__le
 
#define A__B
 
#define A__U
 
#define A__NAME__general   arm_instr_load_w0_byte_u1_p0_imm__general
 
#define A__NAME   arm_instr_load_w0_byte_u1_p0_imm
 
#define A__NAME__eq   arm_instr_load_w0_byte_u1_p0_imm__eq
 
#define A__NAME__ne   arm_instr_load_w0_byte_u1_p0_imm__ne
 
#define A__NAME__cs   arm_instr_load_w0_byte_u1_p0_imm__cs
 
#define A__NAME__cc   arm_instr_load_w0_byte_u1_p0_imm__cc
 
#define A__NAME__mi   arm_instr_load_w0_byte_u1_p0_imm__mi
 
#define A__NAME__pl   arm_instr_load_w0_byte_u1_p0_imm__pl
 
#define A__NAME__vs   arm_instr_load_w0_byte_u1_p0_imm__vs
 
#define A__NAME__vc   arm_instr_load_w0_byte_u1_p0_imm__vc
 
#define A__NAME__hi   arm_instr_load_w0_byte_u1_p0_imm__hi
 
#define A__NAME__ls   arm_instr_load_w0_byte_u1_p0_imm__ls
 
#define A__NAME__ge   arm_instr_load_w0_byte_u1_p0_imm__ge
 
#define A__NAME__lt   arm_instr_load_w0_byte_u1_p0_imm__lt
 
#define A__NAME__gt   arm_instr_load_w0_byte_u1_p0_imm__gt
 
#define A__NAME__le   arm_instr_load_w0_byte_u1_p0_imm__le
 
#define A__NAME_PC   arm_instr_load_w0_byte_u1_p0_imm_pc
 
#define A__NAME_PC__eq   arm_instr_load_w0_byte_u1_p0_imm_pc__eq
 
#define A__NAME_PC__ne   arm_instr_load_w0_byte_u1_p0_imm_pc__ne
 
#define A__NAME_PC__cs   arm_instr_load_w0_byte_u1_p0_imm_pc__cs
 
#define A__NAME_PC__cc   arm_instr_load_w0_byte_u1_p0_imm_pc__cc
 
#define A__NAME_PC__mi   arm_instr_load_w0_byte_u1_p0_imm_pc__mi
 
#define A__NAME_PC__pl   arm_instr_load_w0_byte_u1_p0_imm_pc__pl
 
#define A__NAME_PC__vs   arm_instr_load_w0_byte_u1_p0_imm_pc__vs
 
#define A__NAME_PC__vc   arm_instr_load_w0_byte_u1_p0_imm_pc__vc
 
#define A__NAME_PC__hi   arm_instr_load_w0_byte_u1_p0_imm_pc__hi
 
#define A__NAME_PC__ls   arm_instr_load_w0_byte_u1_p0_imm_pc__ls
 
#define A__NAME_PC__ge   arm_instr_load_w0_byte_u1_p0_imm_pc__ge
 
#define A__NAME_PC__lt   arm_instr_load_w0_byte_u1_p0_imm_pc__lt
 
#define A__NAME_PC__gt   arm_instr_load_w0_byte_u1_p0_imm_pc__gt
 
#define A__NAME_PC__le   arm_instr_load_w0_byte_u1_p0_imm_pc__le
 
#define A__L
 
#define A__B
 
#define A__U
 
#define A__NAME__general   arm_instr_store_w0_word_u1_p0_reg__general
 
#define A__NAME   arm_instr_store_w0_word_u1_p0_reg
 
#define A__NAME__eq   arm_instr_store_w0_word_u1_p0_reg__eq
 
#define A__NAME__ne   arm_instr_store_w0_word_u1_p0_reg__ne
 
#define A__NAME__cs   arm_instr_store_w0_word_u1_p0_reg__cs
 
#define A__NAME__cc   arm_instr_store_w0_word_u1_p0_reg__cc
 
#define A__NAME__mi   arm_instr_store_w0_word_u1_p0_reg__mi
 
#define A__NAME__pl   arm_instr_store_w0_word_u1_p0_reg__pl
 
#define A__NAME__vs   arm_instr_store_w0_word_u1_p0_reg__vs
 
#define A__NAME__vc   arm_instr_store_w0_word_u1_p0_reg__vc
 
#define A__NAME__hi   arm_instr_store_w0_word_u1_p0_reg__hi
 
#define A__NAME__ls   arm_instr_store_w0_word_u1_p0_reg__ls
 
#define A__NAME__ge   arm_instr_store_w0_word_u1_p0_reg__ge
 
#define A__NAME__lt   arm_instr_store_w0_word_u1_p0_reg__lt
 
#define A__NAME__gt   arm_instr_store_w0_word_u1_p0_reg__gt
 
#define A__NAME__le   arm_instr_store_w0_word_u1_p0_reg__le
 
#define A__NAME_PC   arm_instr_store_w0_word_u1_p0_reg_pc
 
#define A__NAME_PC__eq   arm_instr_store_w0_word_u1_p0_reg_pc__eq
 
#define A__NAME_PC__ne   arm_instr_store_w0_word_u1_p0_reg_pc__ne
 
#define A__NAME_PC__cs   arm_instr_store_w0_word_u1_p0_reg_pc__cs
 
#define A__NAME_PC__cc   arm_instr_store_w0_word_u1_p0_reg_pc__cc
 
#define A__NAME_PC__mi   arm_instr_store_w0_word_u1_p0_reg_pc__mi
 
#define A__NAME_PC__pl   arm_instr_store_w0_word_u1_p0_reg_pc__pl
 
#define A__NAME_PC__vs   arm_instr_store_w0_word_u1_p0_reg_pc__vs
 
#define A__NAME_PC__vc   arm_instr_store_w0_word_u1_p0_reg_pc__vc
 
#define A__NAME_PC__hi   arm_instr_store_w0_word_u1_p0_reg_pc__hi
 
#define A__NAME_PC__ls   arm_instr_store_w0_word_u1_p0_reg_pc__ls
 
#define A__NAME_PC__ge   arm_instr_store_w0_word_u1_p0_reg_pc__ge
 
#define A__NAME_PC__lt   arm_instr_store_w0_word_u1_p0_reg_pc__lt
 
#define A__NAME_PC__gt   arm_instr_store_w0_word_u1_p0_reg_pc__gt
 
#define A__NAME_PC__le   arm_instr_store_w0_word_u1_p0_reg_pc__le
 
#define A__U
 
#define A__REG
 
#define A__NAME__general   arm_instr_load_w0_word_u1_p0_reg__general
 
#define A__NAME   arm_instr_load_w0_word_u1_p0_reg
 
#define A__NAME__eq   arm_instr_load_w0_word_u1_p0_reg__eq
 
#define A__NAME__ne   arm_instr_load_w0_word_u1_p0_reg__ne
 
#define A__NAME__cs   arm_instr_load_w0_word_u1_p0_reg__cs
 
#define A__NAME__cc   arm_instr_load_w0_word_u1_p0_reg__cc
 
#define A__NAME__mi   arm_instr_load_w0_word_u1_p0_reg__mi
 
#define A__NAME__pl   arm_instr_load_w0_word_u1_p0_reg__pl
 
#define A__NAME__vs   arm_instr_load_w0_word_u1_p0_reg__vs
 
#define A__NAME__vc   arm_instr_load_w0_word_u1_p0_reg__vc
 
#define A__NAME__hi   arm_instr_load_w0_word_u1_p0_reg__hi
 
#define A__NAME__ls   arm_instr_load_w0_word_u1_p0_reg__ls
 
#define A__NAME__ge   arm_instr_load_w0_word_u1_p0_reg__ge
 
#define A__NAME__lt   arm_instr_load_w0_word_u1_p0_reg__lt
 
#define A__NAME__gt   arm_instr_load_w0_word_u1_p0_reg__gt
 
#define A__NAME__le   arm_instr_load_w0_word_u1_p0_reg__le
 
#define A__NAME_PC   arm_instr_load_w0_word_u1_p0_reg_pc
 
#define A__NAME_PC__eq   arm_instr_load_w0_word_u1_p0_reg_pc__eq
 
#define A__NAME_PC__ne   arm_instr_load_w0_word_u1_p0_reg_pc__ne
 
#define A__NAME_PC__cs   arm_instr_load_w0_word_u1_p0_reg_pc__cs
 
#define A__NAME_PC__cc   arm_instr_load_w0_word_u1_p0_reg_pc__cc
 
#define A__NAME_PC__mi   arm_instr_load_w0_word_u1_p0_reg_pc__mi
 
#define A__NAME_PC__pl   arm_instr_load_w0_word_u1_p0_reg_pc__pl
 
#define A__NAME_PC__vs   arm_instr_load_w0_word_u1_p0_reg_pc__vs
 
#define A__NAME_PC__vc   arm_instr_load_w0_word_u1_p0_reg_pc__vc
 
#define A__NAME_PC__hi   arm_instr_load_w0_word_u1_p0_reg_pc__hi
 
#define A__NAME_PC__ls   arm_instr_load_w0_word_u1_p0_reg_pc__ls
 
#define A__NAME_PC__ge   arm_instr_load_w0_word_u1_p0_reg_pc__ge
 
#define A__NAME_PC__lt   arm_instr_load_w0_word_u1_p0_reg_pc__lt
 
#define A__NAME_PC__gt   arm_instr_load_w0_word_u1_p0_reg_pc__gt
 
#define A__NAME_PC__le   arm_instr_load_w0_word_u1_p0_reg_pc__le
 
#define A__L
 
#define A__U
 
#define A__REG
 
#define A__NAME__general   arm_instr_store_w0_byte_u1_p0_reg__general
 
#define A__NAME   arm_instr_store_w0_byte_u1_p0_reg
 
#define A__NAME__eq   arm_instr_store_w0_byte_u1_p0_reg__eq
 
#define A__NAME__ne   arm_instr_store_w0_byte_u1_p0_reg__ne
 
#define A__NAME__cs   arm_instr_store_w0_byte_u1_p0_reg__cs
 
#define A__NAME__cc   arm_instr_store_w0_byte_u1_p0_reg__cc
 
#define A__NAME__mi   arm_instr_store_w0_byte_u1_p0_reg__mi
 
#define A__NAME__pl   arm_instr_store_w0_byte_u1_p0_reg__pl
 
#define A__NAME__vs   arm_instr_store_w0_byte_u1_p0_reg__vs
 
#define A__NAME__vc   arm_instr_store_w0_byte_u1_p0_reg__vc
 
#define A__NAME__hi   arm_instr_store_w0_byte_u1_p0_reg__hi
 
#define A__NAME__ls   arm_instr_store_w0_byte_u1_p0_reg__ls
 
#define A__NAME__ge   arm_instr_store_w0_byte_u1_p0_reg__ge
 
#define A__NAME__lt   arm_instr_store_w0_byte_u1_p0_reg__lt
 
#define A__NAME__gt   arm_instr_store_w0_byte_u1_p0_reg__gt
 
#define A__NAME__le   arm_instr_store_w0_byte_u1_p0_reg__le
 
#define A__NAME_PC   arm_instr_store_w0_byte_u1_p0_reg_pc
 
#define A__NAME_PC__eq   arm_instr_store_w0_byte_u1_p0_reg_pc__eq
 
#define A__NAME_PC__ne   arm_instr_store_w0_byte_u1_p0_reg_pc__ne
 
#define A__NAME_PC__cs   arm_instr_store_w0_byte_u1_p0_reg_pc__cs
 
#define A__NAME_PC__cc   arm_instr_store_w0_byte_u1_p0_reg_pc__cc
 
#define A__NAME_PC__mi   arm_instr_store_w0_byte_u1_p0_reg_pc__mi
 
#define A__NAME_PC__pl   arm_instr_store_w0_byte_u1_p0_reg_pc__pl
 
#define A__NAME_PC__vs   arm_instr_store_w0_byte_u1_p0_reg_pc__vs
 
#define A__NAME_PC__vc   arm_instr_store_w0_byte_u1_p0_reg_pc__vc
 
#define A__NAME_PC__hi   arm_instr_store_w0_byte_u1_p0_reg_pc__hi
 
#define A__NAME_PC__ls   arm_instr_store_w0_byte_u1_p0_reg_pc__ls
 
#define A__NAME_PC__ge   arm_instr_store_w0_byte_u1_p0_reg_pc__ge
 
#define A__NAME_PC__lt   arm_instr_store_w0_byte_u1_p0_reg_pc__lt
 
#define A__NAME_PC__gt   arm_instr_store_w0_byte_u1_p0_reg_pc__gt
 
#define A__NAME_PC__le   arm_instr_store_w0_byte_u1_p0_reg_pc__le
 
#define A__B
 
#define A__U
 
#define A__REG
 
#define A__NAME__general   arm_instr_load_w0_byte_u1_p0_reg__general
 
#define A__NAME   arm_instr_load_w0_byte_u1_p0_reg
 
#define A__NAME__eq   arm_instr_load_w0_byte_u1_p0_reg__eq
 
#define A__NAME__ne   arm_instr_load_w0_byte_u1_p0_reg__ne
 
#define A__NAME__cs   arm_instr_load_w0_byte_u1_p0_reg__cs
 
#define A__NAME__cc   arm_instr_load_w0_byte_u1_p0_reg__cc
 
#define A__NAME__mi   arm_instr_load_w0_byte_u1_p0_reg__mi
 
#define A__NAME__pl   arm_instr_load_w0_byte_u1_p0_reg__pl
 
#define A__NAME__vs   arm_instr_load_w0_byte_u1_p0_reg__vs
 
#define A__NAME__vc   arm_instr_load_w0_byte_u1_p0_reg__vc
 
#define A__NAME__hi   arm_instr_load_w0_byte_u1_p0_reg__hi
 
#define A__NAME__ls   arm_instr_load_w0_byte_u1_p0_reg__ls
 
#define A__NAME__ge   arm_instr_load_w0_byte_u1_p0_reg__ge
 
#define A__NAME__lt   arm_instr_load_w0_byte_u1_p0_reg__lt
 
#define A__NAME__gt   arm_instr_load_w0_byte_u1_p0_reg__gt
 
#define A__NAME__le   arm_instr_load_w0_byte_u1_p0_reg__le
 
#define A__NAME_PC   arm_instr_load_w0_byte_u1_p0_reg_pc
 
#define A__NAME_PC__eq   arm_instr_load_w0_byte_u1_p0_reg_pc__eq
 
#define A__NAME_PC__ne   arm_instr_load_w0_byte_u1_p0_reg_pc__ne
 
#define A__NAME_PC__cs   arm_instr_load_w0_byte_u1_p0_reg_pc__cs
 
#define A__NAME_PC__cc   arm_instr_load_w0_byte_u1_p0_reg_pc__cc
 
#define A__NAME_PC__mi   arm_instr_load_w0_byte_u1_p0_reg_pc__mi
 
#define A__NAME_PC__pl   arm_instr_load_w0_byte_u1_p0_reg_pc__pl
 
#define A__NAME_PC__vs   arm_instr_load_w0_byte_u1_p0_reg_pc__vs
 
#define A__NAME_PC__vc   arm_instr_load_w0_byte_u1_p0_reg_pc__vc
 
#define A__NAME_PC__hi   arm_instr_load_w0_byte_u1_p0_reg_pc__hi
 
#define A__NAME_PC__ls   arm_instr_load_w0_byte_u1_p0_reg_pc__ls
 
#define A__NAME_PC__ge   arm_instr_load_w0_byte_u1_p0_reg_pc__ge
 
#define A__NAME_PC__lt   arm_instr_load_w0_byte_u1_p0_reg_pc__lt
 
#define A__NAME_PC__gt   arm_instr_load_w0_byte_u1_p0_reg_pc__gt
 
#define A__NAME_PC__le   arm_instr_load_w0_byte_u1_p0_reg_pc__le
 
#define A__L
 
#define A__B
 
#define A__U
 
#define A__REG
 
#define A__NAME__general   arm_instr_store_w0_signed_byte_u1_p0_imm__general
 
#define A__NAME   arm_instr_store_w0_signed_byte_u1_p0_imm
 
#define A__NAME__eq   arm_instr_store_w0_signed_byte_u1_p0_imm__eq
 
#define A__NAME__ne   arm_instr_store_w0_signed_byte_u1_p0_imm__ne
 
#define A__NAME__cs   arm_instr_store_w0_signed_byte_u1_p0_imm__cs
 
#define A__NAME__cc   arm_instr_store_w0_signed_byte_u1_p0_imm__cc
 
#define A__NAME__mi   arm_instr_store_w0_signed_byte_u1_p0_imm__mi
 
#define A__NAME__pl   arm_instr_store_w0_signed_byte_u1_p0_imm__pl
 
#define A__NAME__vs   arm_instr_store_w0_signed_byte_u1_p0_imm__vs
 
#define A__NAME__vc   arm_instr_store_w0_signed_byte_u1_p0_imm__vc
 
#define A__NAME__hi   arm_instr_store_w0_signed_byte_u1_p0_imm__hi
 
#define A__NAME__ls   arm_instr_store_w0_signed_byte_u1_p0_imm__ls
 
#define A__NAME__ge   arm_instr_store_w0_signed_byte_u1_p0_imm__ge
 
#define A__NAME__lt   arm_instr_store_w0_signed_byte_u1_p0_imm__lt
 
#define A__NAME__gt   arm_instr_store_w0_signed_byte_u1_p0_imm__gt
 
#define A__NAME__le   arm_instr_store_w0_signed_byte_u1_p0_imm__le
 
#define A__NAME_PC   arm_instr_store_w0_signed_byte_u1_p0_imm_pc
 
#define A__NAME_PC__eq   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__eq
 
#define A__NAME_PC__ne   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ne
 
#define A__NAME_PC__cs   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cs
 
#define A__NAME_PC__cc   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cc
 
#define A__NAME_PC__mi   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__mi
 
#define A__NAME_PC__pl   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__pl
 
#define A__NAME_PC__vs   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vs
 
#define A__NAME_PC__vc   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vc
 
#define A__NAME_PC__hi   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__hi
 
#define A__NAME_PC__ls   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ls
 
#define A__NAME_PC__ge   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ge
 
#define A__NAME_PC__lt   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__lt
 
#define A__NAME_PC__gt   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__gt
 
#define A__NAME_PC__le   arm_instr_store_w0_signed_byte_u1_p0_imm_pc__le
 
#define A__SIGNED
 
#define A__B
 
#define A__U
 
#define A__NAME__general   arm_instr_load_w0_signed_byte_u1_p0_imm__general
 
#define A__NAME   arm_instr_load_w0_signed_byte_u1_p0_imm
 
#define A__NAME__eq   arm_instr_load_w0_signed_byte_u1_p0_imm__eq
 
#define A__NAME__ne   arm_instr_load_w0_signed_byte_u1_p0_imm__ne
 
#define A__NAME__cs   arm_instr_load_w0_signed_byte_u1_p0_imm__cs
 
#define A__NAME__cc   arm_instr_load_w0_signed_byte_u1_p0_imm__cc
 
#define A__NAME__mi   arm_instr_load_w0_signed_byte_u1_p0_imm__mi
 
#define A__NAME__pl   arm_instr_load_w0_signed_byte_u1_p0_imm__pl
 
#define A__NAME__vs   arm_instr_load_w0_signed_byte_u1_p0_imm__vs
 
#define A__NAME__vc   arm_instr_load_w0_signed_byte_u1_p0_imm__vc
 
#define A__NAME__hi   arm_instr_load_w0_signed_byte_u1_p0_imm__hi
 
#define A__NAME__ls   arm_instr_load_w0_signed_byte_u1_p0_imm__ls
 
#define A__NAME__ge   arm_instr_load_w0_signed_byte_u1_p0_imm__ge
 
#define A__NAME__lt   arm_instr_load_w0_signed_byte_u1_p0_imm__lt
 
#define A__NAME__gt   arm_instr_load_w0_signed_byte_u1_p0_imm__gt
 
#define A__NAME__le   arm_instr_load_w0_signed_byte_u1_p0_imm__le
 
#define A__NAME_PC   arm_instr_load_w0_signed_byte_u1_p0_imm_pc
 
#define A__NAME_PC__eq   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__eq
 
#define A__NAME_PC__ne   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ne
 
#define A__NAME_PC__cs   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cs
 
#define A__NAME_PC__cc   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cc
 
#define A__NAME_PC__mi   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__mi
 
#define A__NAME_PC__pl   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__pl
 
#define A__NAME_PC__vs   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vs
 
#define A__NAME_PC__vc   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vc
 
#define A__NAME_PC__hi   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__hi
 
#define A__NAME_PC__ls   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ls
 
#define A__NAME_PC__ge   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ge
 
#define A__NAME_PC__lt   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__lt
 
#define A__NAME_PC__gt   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__gt
 
#define A__NAME_PC__le   arm_instr_load_w0_signed_byte_u1_p0_imm_pc__le
 
#define A__SIGNED
 
#define A__L
 
#define A__B
 
#define A__U
 
#define A__NAME__general   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__general
 
#define A__NAME   arm_instr_store_w0_unsigned_halfword_u1_p0_imm
 
#define A__NAME__eq   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__eq
 
#define A__NAME__ne   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ne
 
#define A__NAME__cs   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cs
 
#define A__NAME__cc   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cc
 
#define A__NAME__mi   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__mi
 
#define A__NAME__pl   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__pl
 
#define A__NAME__vs   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vs
 
#define A__NAME__vc   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vc
 
#define A__NAME__hi   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__hi
 
#define A__NAME__ls   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ls
 
#define A__NAME__ge   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ge
 
#define A__NAME__lt   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__lt
 
#define A__NAME__gt   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__gt
 
#define A__NAME__le   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__le
 
#define A__NAME_PC   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc
 
#define A__NAME_PC__eq   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__eq
 
#define A__NAME_PC__ne   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ne
 
#define A__NAME_PC__cs   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cs
 
#define A__NAME_PC__cc   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cc
 
#define A__NAME_PC__mi   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__mi
 
#define A__NAME_PC__pl   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__pl
 
#define A__NAME_PC__vs   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vs
 
#define A__NAME_PC__vc   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vc
 
#define A__NAME_PC__hi   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__hi
 
#define A__NAME_PC__ls   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ls
 
#define A__NAME_PC__ge   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ge
 
#define A__NAME_PC__lt   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__lt
 
#define A__NAME_PC__gt   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__gt
 
#define A__NAME_PC__le   arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__le
 
#define A__H
 
#define A__U
 
#define A__NAME__general   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__general
 
#define A__NAME   arm_instr_load_w0_unsigned_halfword_u1_p0_imm
 
#define A__NAME__eq   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__eq
 
#define A__NAME__ne   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ne
 
#define A__NAME__cs   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cs
 
#define A__NAME__cc   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cc
 
#define A__NAME__mi   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__mi
 
#define A__NAME__pl   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__pl
 
#define A__NAME__vs   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vs
 
#define A__NAME__vc   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vc
 
#define A__NAME__hi   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__hi
 
#define A__NAME__ls   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ls
 
#define A__NAME__ge   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ge
 
#define A__NAME__lt   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__lt
 
#define A__NAME__gt   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__gt
 
#define A__NAME__le   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__le
 
#define A__NAME_PC   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc
 
#define A__NAME_PC__eq   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__eq
 
#define A__NAME_PC__ne   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ne
 
#define A__NAME_PC__cs   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cs
 
#define A__NAME_PC__cc   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cc
 
#define A__NAME_PC__mi   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__mi
 
#define A__NAME_PC__pl   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__pl
 
#define A__NAME_PC__vs   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vs
 
#define A__NAME_PC__vc   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vc
 
#define A__NAME_PC__hi   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__hi
 
#define A__NAME_PC__ls   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ls
 
#define A__NAME_PC__ge   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ge
 
#define A__NAME_PC__lt   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__lt
 
#define A__NAME_PC__gt   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__gt
 
#define A__NAME_PC__le   arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__le
 
#define A__L
 
#define A__H
 
#define A__U
 
#define A__NAME__general   arm_instr_store_w0_signed_halfword_u1_p0_imm__general
 
#define A__NAME   arm_instr_store_w0_signed_halfword_u1_p0_imm
 
#define A__NAME__eq   arm_instr_store_w0_signed_halfword_u1_p0_imm__eq
 
#define A__NAME__ne   arm_instr_store_w0_signed_halfword_u1_p0_imm__ne
 
#define A__NAME__cs   arm_instr_store_w0_signed_halfword_u1_p0_imm__cs
 
#define A__NAME__cc   arm_instr_store_w0_signed_halfword_u1_p0_imm__cc
 
#define A__NAME__mi   arm_instr_store_w0_signed_halfword_u1_p0_imm__mi
 
#define A__NAME__pl   arm_instr_store_w0_signed_halfword_u1_p0_imm__pl
 
#define A__NAME__vs   arm_instr_store_w0_signed_halfword_u1_p0_imm__vs
 
#define A__NAME__vc   arm_instr_store_w0_signed_halfword_u1_p0_imm__vc
 
#define A__NAME__hi   arm_instr_store_w0_signed_halfword_u1_p0_imm__hi
 
#define A__NAME__ls   arm_instr_store_w0_signed_halfword_u1_p0_imm__ls
 
#define A__NAME__ge   arm_instr_store_w0_signed_halfword_u1_p0_imm__ge
 
#define A__NAME__lt   arm_instr_store_w0_signed_halfword_u1_p0_imm__lt
 
#define A__NAME__gt   arm_instr_store_w0_signed_halfword_u1_p0_imm__gt
 
#define A__NAME__le   arm_instr_store_w0_signed_halfword_u1_p0_imm__le
 
#define A__NAME_PC   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc
 
#define A__NAME_PC__eq   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__eq
 
#define A__NAME_PC__ne   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ne
 
#define A__NAME_PC__cs   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cs
 
#define A__NAME_PC__cc   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cc
 
#define A__NAME_PC__mi   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__mi
 
#define A__NAME_PC__pl   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__pl
 
#define A__NAME_PC__vs   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vs
 
#define A__NAME_PC__vc   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vc
 
#define A__NAME_PC__hi   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__hi
 
#define A__NAME_PC__ls   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ls
 
#define A__NAME_PC__ge   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ge
 
#define A__NAME_PC__lt   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__lt
 
#define A__NAME_PC__gt   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__gt
 
#define A__NAME_PC__le   arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__le
 
#define A__SIGNED
 
#define A__H
 
#define A__U
 
#define A__NAME__general   arm_instr_load_w0_signed_halfword_u1_p0_imm__general
 
#define A__NAME   arm_instr_load_w0_signed_halfword_u1_p0_imm
 
#define A__NAME__eq   arm_instr_load_w0_signed_halfword_u1_p0_imm__eq
 
#define A__NAME__ne   arm_instr_load_w0_signed_halfword_u1_p0_imm__ne
 
#define A__NAME__cs   arm_instr_load_w0_signed_halfword_u1_p0_imm__cs
 
#define A__NAME__cc   arm_instr_load_w0_signed_halfword_u1_p0_imm__cc
 
#define A__NAME__mi   arm_instr_load_w0_signed_halfword_u1_p0_imm__mi
 
#define A__NAME__pl   arm_instr_load_w0_signed_halfword_u1_p0_imm__pl
 
#define A__NAME__vs   arm_instr_load_w0_signed_halfword_u1_p0_imm__vs
 
#define A__NAME__vc   arm_instr_load_w0_signed_halfword_u1_p0_imm__vc
 
#define A__NAME__hi   arm_instr_load_w0_signed_halfword_u1_p0_imm__hi
 
#define A__NAME__ls   arm_instr_load_w0_signed_halfword_u1_p0_imm__ls
 
#define A__NAME__ge   arm_instr_load_w0_signed_halfword_u1_p0_imm__ge
 
#define A__NAME__lt   arm_instr_load_w0_signed_halfword_u1_p0_imm__lt
 
#define A__NAME__gt   arm_instr_load_w0_signed_halfword_u1_p0_imm__gt
 
#define A__NAME__le   arm_instr_load_w0_signed_halfword_u1_p0_imm__le
 
#define A__NAME_PC   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc
 
#define A__NAME_PC__eq   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__eq
 
#define A__NAME_PC__ne   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ne
 
#define A__NAME_PC__cs   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cs
 
#define A__NAME_PC__cc   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cc
 
#define A__NAME_PC__mi   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__mi
 
#define A__NAME_PC__pl   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__pl
 
#define A__NAME_PC__vs   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vs
 
#define A__NAME_PC__vc   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vc
 
#define A__NAME_PC__hi   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__hi
 
#define A__NAME_PC__ls   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ls
 
#define A__NAME_PC__ge   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ge
 
#define A__NAME_PC__lt   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__lt
 
#define A__NAME_PC__gt   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__gt
 
#define A__NAME_PC__le   arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__le
 
#define A__SIGNED
 
#define A__L
 
#define A__H
 
#define A__U
 
#define A__NAME__general   arm_instr_store_w0_signed_byte_u1_p0_reg__general
 
#define A__NAME   arm_instr_store_w0_signed_byte_u1_p0_reg
 
#define A__NAME__eq   arm_instr_store_w0_signed_byte_u1_p0_reg__eq
 
#define A__NAME__ne   arm_instr_store_w0_signed_byte_u1_p0_reg__ne
 
#define A__NAME__cs   arm_instr_store_w0_signed_byte_u1_p0_reg__cs
 
#define A__NAME__cc   arm_instr_store_w0_signed_byte_u1_p0_reg__cc
 
#define A__NAME__mi   arm_instr_store_w0_signed_byte_u1_p0_reg__mi
 
#define A__NAME__pl   arm_instr_store_w0_signed_byte_u1_p0_reg__pl
 
#define A__NAME__vs   arm_instr_store_w0_signed_byte_u1_p0_reg__vs
 
#define A__NAME__vc   arm_instr_store_w0_signed_byte_u1_p0_reg__vc
 
#define A__NAME__hi   arm_instr_store_w0_signed_byte_u1_p0_reg__hi
 
#define A__NAME__ls   arm_instr_store_w0_signed_byte_u1_p0_reg__ls
 
#define A__NAME__ge   arm_instr_store_w0_signed_byte_u1_p0_reg__ge
 
#define A__NAME__lt   arm_instr_store_w0_signed_byte_u1_p0_reg__lt
 
#define A__NAME__gt   arm_instr_store_w0_signed_byte_u1_p0_reg__gt
 
#define A__NAME__le   arm_instr_store_w0_signed_byte_u1_p0_reg__le
 
#define A__NAME_PC   arm_instr_store_w0_signed_byte_u1_p0_reg_pc
 
#define A__NAME_PC__eq   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__eq
 
#define A__NAME_PC__ne   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ne
 
#define A__NAME_PC__cs   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cs
 
#define A__NAME_PC__cc   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cc
 
#define A__NAME_PC__mi   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__mi
 
#define A__NAME_PC__pl   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__pl
 
#define A__NAME_PC__vs   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vs
 
#define A__NAME_PC__vc   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vc
 
#define A__NAME_PC__hi   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__hi
 
#define A__NAME_PC__ls   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ls
 
#define A__NAME_PC__ge   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ge
 
#define A__NAME_PC__lt   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__lt
 
#define A__NAME_PC__gt   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__gt
 
#define A__NAME_PC__le   arm_instr_store_w0_signed_byte_u1_p0_reg_pc__le
 
#define A__SIGNED
 
#define A__B
 
#define A__U
 
#define A__REG
 
#define A__NAME__general   arm_instr_load_w0_signed_byte_u1_p0_reg__general
 
#define A__NAME   arm_instr_load_w0_signed_byte_u1_p0_reg
 
#define A__NAME__eq   arm_instr_load_w0_signed_byte_u1_p0_reg__eq
 
#define A__NAME__ne   arm_instr_load_w0_signed_byte_u1_p0_reg__ne
 
#define A__NAME__cs   arm_instr_load_w0_signed_byte_u1_p0_reg__cs
 
#define A__NAME__cc   arm_instr_load_w0_signed_byte_u1_p0_reg__cc
 
#define A__NAME__mi   arm_instr_load_w0_signed_byte_u1_p0_reg__mi
 
#define A__NAME__pl   arm_instr_load_w0_signed_byte_u1_p0_reg__pl
 
#define A__NAME__vs   arm_instr_load_w0_signed_byte_u1_p0_reg__vs
 
#define A__NAME__vc   arm_instr_load_w0_signed_byte_u1_p0_reg__vc
 
#define A__NAME__hi   arm_instr_load_w0_signed_byte_u1_p0_reg__hi
 
#define A__NAME__ls   arm_instr_load_w0_signed_byte_u1_p0_reg__ls
 
#define A__NAME__ge   arm_instr_load_w0_signed_byte_u1_p0_reg__ge
 
#define A__NAME__lt   arm_instr_load_w0_signed_byte_u1_p0_reg__lt
 
#define A__NAME__gt   arm_instr_load_w0_signed_byte_u1_p0_reg__gt
 
#define A__NAME__le   arm_instr_load_w0_signed_byte_u1_p0_reg__le
 
#define A__NAME_PC   arm_instr_load_w0_signed_byte_u1_p0_reg_pc
 
#define A__NAME_PC__eq   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__eq
 
#define A__NAME_PC__ne   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ne
 
#define A__NAME_PC__cs   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cs
 
#define A__NAME_PC__cc   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cc
 
#define A__NAME_PC__mi   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__mi
 
#define A__NAME_PC__pl   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__pl
 
#define A__NAME_PC__vs   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vs
 
#define A__NAME_PC__vc   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vc
 
#define A__NAME_PC__hi   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__hi
 
#define A__NAME_PC__ls   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ls
 
#define A__NAME_PC__ge   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ge
 
#define A__NAME_PC__lt   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__lt
 
#define A__NAME_PC__gt   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__gt
 
#define A__NAME_PC__le   arm_instr_load_w0_signed_byte_u1_p0_reg_pc__le
 
#define A__SIGNED
 
#define A__L
 
#define A__B
 
#define A__U
 
#define A__REG
 
#define A__NAME__general   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__general
 
#define A__NAME   arm_instr_store_w0_unsigned_halfword_u1_p0_reg
 
#define A__NAME__eq   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__eq
 
#define A__NAME__ne   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ne
 
#define A__NAME__cs   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cs
 
#define A__NAME__cc   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cc
 
#define A__NAME__mi   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__mi
 
#define A__NAME__pl   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__pl
 
#define A__NAME__vs   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vs
 
#define A__NAME__vc   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vc
 
#define A__NAME__hi   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__hi
 
#define A__NAME__ls   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ls
 
#define A__NAME__ge   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ge
 
#define A__NAME__lt   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__lt
 
#define A__NAME__gt   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__gt
 
#define A__NAME__le   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__le
 
#define A__NAME_PC   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc
 
#define A__NAME_PC__eq   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__eq
 
#define A__NAME_PC__ne   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ne
 
#define A__NAME_PC__cs   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cs
 
#define A__NAME_PC__cc   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cc
 
#define A__NAME_PC__mi   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__mi
 
#define A__NAME_PC__pl   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__pl
 
#define A__NAME_PC__vs   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vs
 
#define A__NAME_PC__vc   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vc
 
#define A__NAME_PC__hi   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__hi
 
#define A__NAME_PC__ls   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ls
 
#define A__NAME_PC__ge   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ge
 
#define A__NAME_PC__lt   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__lt
 
#define A__NAME_PC__gt   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__gt
 
#define A__NAME_PC__le   arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__le
 
#define A__H
 
#define A__U
 
#define A__REG
 
#define A__NAME__general   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__general
 
#define A__NAME   arm_instr_load_w0_unsigned_halfword_u1_p0_reg
 
#define A__NAME__eq   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__eq
 
#define A__NAME__ne   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ne
 
#define A__NAME__cs   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cs
 
#define A__NAME__cc   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cc
 
#define A__NAME__mi   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__mi
 
#define A__NAME__pl   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__pl
 
#define A__NAME__vs   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vs
 
#define A__NAME__vc   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vc
 
#define A__NAME__hi   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__hi
 
#define A__NAME__ls   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ls
 
#define A__NAME__ge   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ge
 
#define A__NAME__lt   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__lt
 
#define A__NAME__gt   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__gt
 
#define A__NAME__le   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__le
 
#define A__NAME_PC   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc
 
#define A__NAME_PC__eq   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__eq
 
#define A__NAME_PC__ne   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ne
 
#define A__NAME_PC__cs   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cs
 
#define A__NAME_PC__cc   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cc
 
#define A__NAME_PC__mi   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__mi
 
#define A__NAME_PC__pl   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__pl
 
#define A__NAME_PC__vs   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vs
 
#define A__NAME_PC__vc   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vc
 
#define A__NAME_PC__hi   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__hi
 
#define A__NAME_PC__ls   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ls
 
#define A__NAME_PC__ge   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ge
 
#define A__NAME_PC__lt   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__lt
 
#define A__NAME_PC__gt   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__gt
 
#define A__NAME_PC__le   arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__le
 
#define A__L
 
#define A__H
 
#define A__U
 
#define A__REG
 
#define A__NAME__general   arm_instr_store_w0_signed_halfword_u1_p0_reg__general
 
#define A__NAME   arm_instr_store_w0_signed_halfword_u1_p0_reg
 
#define A__NAME__eq   arm_instr_store_w0_signed_halfword_u1_p0_reg__eq
 
#define A__NAME__ne   arm_instr_store_w0_signed_halfword_u1_p0_reg__ne
 
#define A__NAME__cs   arm_instr_store_w0_signed_halfword_u1_p0_reg__cs
 
#define A__NAME__cc   arm_instr_store_w0_signed_halfword_u1_p0_reg__cc
 
#define A__NAME__mi   arm_instr_store_w0_signed_halfword_u1_p0_reg__mi
 
#define A__NAME__pl   arm_instr_store_w0_signed_halfword_u1_p0_reg__pl
 
#define A__NAME__vs   arm_instr_store_w0_signed_halfword_u1_p0_reg__vs
 
#define A__NAME__vc   arm_instr_store_w0_signed_halfword_u1_p0_reg__vc
 
#define A__NAME__hi   arm_instr_store_w0_signed_halfword_u1_p0_reg__hi
 
#define A__NAME__ls   arm_instr_store_w0_signed_halfword_u1_p0_reg__ls
 
#define A__NAME__ge   arm_instr_store_w0_signed_halfword_u1_p0_reg__ge
 
#define A__NAME__lt   arm_instr_store_w0_signed_halfword_u1_p0_reg__lt
 
#define A__NAME__gt   arm_instr_store_w0_signed_halfword_u1_p0_reg__gt
 
#define A__NAME__le   arm_instr_store_w0_signed_halfword_u1_p0_reg__le
 
#define A__NAME_PC   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc
 
#define A__NAME_PC__eq   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__eq
 
#define A__NAME_PC__ne   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ne
 
#define A__NAME_PC__cs   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cs
 
#define A__NAME_PC__cc   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cc
 
#define A__NAME_PC__mi   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__mi
 
#define A__NAME_PC__pl   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__pl
 
#define A__NAME_PC__vs   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vs
 
#define A__NAME_PC__vc   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vc
 
#define A__NAME_PC__hi   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__hi
 
#define A__NAME_PC__ls   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ls
 
#define A__NAME_PC__ge   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ge
 
#define A__NAME_PC__lt   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__lt
 
#define A__NAME_PC__gt   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__gt
 
#define A__NAME_PC__le   arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__le
 
#define A__SIGNED
 
#define A__H
 
#define A__U
 
#define A__REG
 
#define A__NAME__general   arm_instr_load_w0_signed_halfword_u1_p0_reg__general
 
#define A__NAME   arm_instr_load_w0_signed_halfword_u1_p0_reg
 
#define A__NAME__eq   arm_instr_load_w0_signed_halfword_u1_p0_reg__eq
 
#define A__NAME__ne   arm_instr_load_w0_signed_halfword_u1_p0_reg__ne
 
#define A__NAME__cs   arm_instr_load_w0_signed_halfword_u1_p0_reg__cs
 
#define A__NAME__cc   arm_instr_load_w0_signed_halfword_u1_p0_reg__cc
 
#define A__NAME__mi   arm_instr_load_w0_signed_halfword_u1_p0_reg__mi
 
#define A__NAME__pl   arm_instr_load_w0_signed_halfword_u1_p0_reg__pl
 
#define A__NAME__vs   arm_instr_load_w0_signed_halfword_u1_p0_reg__vs
 
#define A__NAME__vc   arm_instr_load_w0_signed_halfword_u1_p0_reg__vc
 
#define A__NAME__hi   arm_instr_load_w0_signed_halfword_u1_p0_reg__hi
 
#define A__NAME__ls   arm_instr_load_w0_signed_halfword_u1_p0_reg__ls
 
#define A__NAME__ge   arm_instr_load_w0_signed_halfword_u1_p0_reg__ge
 
#define A__NAME__lt   arm_instr_load_w0_signed_halfword_u1_p0_reg__lt
 
#define A__NAME__gt   arm_instr_load_w0_signed_halfword_u1_p0_reg__gt
 
#define A__NAME__le   arm_instr_load_w0_signed_halfword_u1_p0_reg__le
 
#define A__NAME_PC   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc
 
#define A__NAME_PC__eq   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__eq
 
#define A__NAME_PC__ne   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ne
 
#define A__NAME_PC__cs   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cs
 
#define A__NAME_PC__cc   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cc
 
#define A__NAME_PC__mi   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__mi
 
#define A__NAME_PC__pl   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__pl
 
#define A__NAME_PC__vs   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vs
 
#define A__NAME_PC__vc   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vc
 
#define A__NAME_PC__hi   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__hi
 
#define A__NAME_PC__ls   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ls
 
#define A__NAME_PC__ge   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ge
 
#define A__NAME_PC__lt   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__lt
 
#define A__NAME_PC__gt   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__gt
 
#define A__NAME_PC__le   arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__le
 
#define A__SIGNED
 
#define A__L
 
#define A__H
 
#define A__U
 
#define A__REG
 

Functions

void arm_instr_nop (struct cpu *, struct arm_instr_call *)
 
void arm_instr_invalid (struct cpu *, struct arm_instr_call *)
 
void arm_pc_to_pointers (struct cpu *)
 

Macro Definition Documentation

◆ A__B [1/8]

#define A__B

Definition at line 1080 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__B [2/8]

#define A__B

Definition at line 1080 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__B [3/8]

#define A__B

Definition at line 1080 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__B [4/8]

#define A__B

Definition at line 1080 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__B [5/8]

#define A__B

Definition at line 1080 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__B [6/8]

#define A__B

Definition at line 1080 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__B [7/8]

#define A__B

Definition at line 1080 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__B [8/8]

#define A__B

Definition at line 1080 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__H [1/8]

#define A__H

Definition at line 1364 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__H [2/8]

#define A__H

Definition at line 1364 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__H [3/8]

#define A__H

Definition at line 1364 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__H [4/8]

#define A__H

Definition at line 1364 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__H [5/8]

#define A__H

Definition at line 1364 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__H [6/8]

#define A__H

Definition at line 1364 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__H [7/8]

#define A__H

Definition at line 1364 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__H [8/8]

#define A__H

Definition at line 1364 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__L [1/10]

#define A__L

Definition at line 1363 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__L [2/10]

#define A__L

Definition at line 1363 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__L [3/10]

#define A__L

Definition at line 1363 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__L [4/10]

#define A__L

Definition at line 1363 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__L [5/10]

#define A__L

Definition at line 1363 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__L [6/10]

#define A__L

Definition at line 1363 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__L [7/10]

#define A__L

Definition at line 1363 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__L

Definition at line 1363 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__L

Definition at line 1363 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__L

Definition at line 1363 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME [1/20]

#define A__NAME   arm_instr_store_w0_word_u1_p0_imm

Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME [2/20]

#define A__NAME   arm_instr_load_w0_word_u1_p0_imm

Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME [3/20]

#define A__NAME   arm_instr_store_w0_byte_u1_p0_imm

Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME [4/20]

#define A__NAME   arm_instr_load_w0_byte_u1_p0_imm

Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME [5/20]

#define A__NAME   arm_instr_store_w0_word_u1_p0_reg

Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME   arm_instr_load_w0_word_u1_p0_reg

Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME [7/20]

#define A__NAME   arm_instr_store_w0_byte_u1_p0_reg

Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME [8/20]

#define A__NAME   arm_instr_load_w0_byte_u1_p0_reg

Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1332 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cc   arm_instr_store_w0_word_u1_p0_imm__cc

Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cc   arm_instr_load_w0_word_u1_p0_imm__cc

Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cc   arm_instr_store_w0_byte_u1_p0_imm__cc

Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cc   arm_instr_load_w0_byte_u1_p0_imm__cc

Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cc   arm_instr_store_w0_word_u1_p0_reg__cc

Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cc   arm_instr_load_w0_word_u1_p0_reg__cc

Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cc   arm_instr_store_w0_byte_u1_p0_reg__cc

Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cc   arm_instr_load_w0_byte_u1_p0_reg__cc

Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1336 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__cs [1/20]

#define A__NAME__cs   arm_instr_store_w0_word_u1_p0_imm__cs

Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cs   arm_instr_load_w0_word_u1_p0_imm__cs

Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cs   arm_instr_store_w0_byte_u1_p0_imm__cs

Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cs   arm_instr_load_w0_byte_u1_p0_imm__cs

Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cs   arm_instr_store_w0_word_u1_p0_reg__cs

Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__cs   arm_instr_load_w0_word_u1_p0_reg__cs

Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__cs [7/20]

#define A__NAME__cs   arm_instr_store_w0_byte_u1_p0_reg__cs

Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__cs [8/20]

#define A__NAME__cs   arm_instr_load_w0_byte_u1_p0_reg__cs

Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__cs [18/20]

Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__cs [19/20]

Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__cs [20/20]

Definition at line 1335 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__eq [1/20]

#define A__NAME__eq   arm_instr_store_w0_word_u1_p0_imm__eq

Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__eq   arm_instr_load_w0_word_u1_p0_imm__eq

Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__eq   arm_instr_store_w0_byte_u1_p0_imm__eq

Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__eq   arm_instr_load_w0_byte_u1_p0_imm__eq

Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__eq   arm_instr_store_w0_word_u1_p0_reg__eq

Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__eq   arm_instr_load_w0_word_u1_p0_reg__eq

Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__eq [7/20]

#define A__NAME__eq   arm_instr_store_w0_byte_u1_p0_reg__eq

Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__eq   arm_instr_load_w0_byte_u1_p0_reg__eq

Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__eq [16/20]

Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__eq [18/20]

Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1333 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__ge [1/20]

#define A__NAME__ge   arm_instr_store_w0_word_u1_p0_imm__ge

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__ge [2/20]

#define A__NAME__ge   arm_instr_load_w0_word_u1_p0_imm__ge

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__ge [3/20]

#define A__NAME__ge   arm_instr_store_w0_byte_u1_p0_imm__ge

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__ge [4/20]

#define A__NAME__ge   arm_instr_load_w0_byte_u1_p0_imm__ge

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ge   arm_instr_store_w0_word_u1_p0_reg__ge

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ge   arm_instr_load_w0_word_u1_p0_reg__ge

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__ge [7/20]

#define A__NAME__ge   arm_instr_store_w0_byte_u1_p0_reg__ge

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__ge [8/20]

#define A__NAME__ge   arm_instr_load_w0_byte_u1_p0_reg__ge

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__ge [16/20]

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__ge [17/20]

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__ge [18/20]

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__ge [19/20]

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__ge [20/20]

Definition at line 1343 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [1/20]

#define A__NAME__general   arm_instr_store_w0_word_u1_p0_imm__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__general   arm_instr_load_w0_word_u1_p0_imm__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__general   arm_instr_store_w0_byte_u1_p0_imm__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__general   arm_instr_load_w0_byte_u1_p0_imm__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__general   arm_instr_store_w0_word_u1_p0_reg__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__general   arm_instr_load_w0_word_u1_p0_reg__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__general   arm_instr_store_w0_byte_u1_p0_reg__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [8/20]

#define A__NAME__general   arm_instr_load_w0_byte_u1_p0_reg__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [9/20]

#define A__NAME__general   arm_instr_store_w0_signed_byte_u1_p0_imm__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [10/20]

#define A__NAME__general   arm_instr_load_w0_signed_byte_u1_p0_imm__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [11/20]

#define A__NAME__general   arm_instr_store_w0_unsigned_halfword_u1_p0_imm__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [12/20]

#define A__NAME__general   arm_instr_load_w0_unsigned_halfword_u1_p0_imm__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [13/20]

#define A__NAME__general   arm_instr_store_w0_signed_halfword_u1_p0_imm__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [14/20]

#define A__NAME__general   arm_instr_load_w0_signed_halfword_u1_p0_imm__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [15/20]

#define A__NAME__general   arm_instr_store_w0_signed_byte_u1_p0_reg__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [16/20]

#define A__NAME__general   arm_instr_load_w0_signed_byte_u1_p0_reg__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [17/20]

#define A__NAME__general   arm_instr_store_w0_unsigned_halfword_u1_p0_reg__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [18/20]

#define A__NAME__general   arm_instr_load_w0_unsigned_halfword_u1_p0_reg__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [19/20]

#define A__NAME__general   arm_instr_store_w0_signed_halfword_u1_p0_reg__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__general [20/20]

#define A__NAME__general   arm_instr_load_w0_signed_halfword_u1_p0_reg__general

Definition at line 1331 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__gt [1/20]

#define A__NAME__gt   arm_instr_store_w0_word_u1_p0_imm__gt

Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__gt   arm_instr_load_w0_word_u1_p0_imm__gt

Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__gt [3/20]

#define A__NAME__gt   arm_instr_store_w0_byte_u1_p0_imm__gt

Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__gt   arm_instr_load_w0_byte_u1_p0_imm__gt

Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__gt   arm_instr_store_w0_word_u1_p0_reg__gt

Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__gt   arm_instr_load_w0_word_u1_p0_reg__gt

Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__gt   arm_instr_store_w0_byte_u1_p0_reg__gt

Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__gt [8/20]

#define A__NAME__gt   arm_instr_load_w0_byte_u1_p0_reg__gt

Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1345 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__hi   arm_instr_store_w0_word_u1_p0_imm__hi

Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__hi   arm_instr_load_w0_word_u1_p0_imm__hi

Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__hi   arm_instr_store_w0_byte_u1_p0_imm__hi

Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__hi   arm_instr_load_w0_byte_u1_p0_imm__hi

Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__hi   arm_instr_store_w0_word_u1_p0_reg__hi

Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__hi   arm_instr_load_w0_word_u1_p0_reg__hi

Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__hi   arm_instr_store_w0_byte_u1_p0_reg__hi

Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__hi   arm_instr_load_w0_byte_u1_p0_reg__hi

Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1341 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__le   arm_instr_store_w0_word_u1_p0_imm__le

Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__le   arm_instr_load_w0_word_u1_p0_imm__le

Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__le   arm_instr_store_w0_byte_u1_p0_imm__le

Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__le   arm_instr_load_w0_byte_u1_p0_imm__le

Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__le   arm_instr_store_w0_word_u1_p0_reg__le

Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__le   arm_instr_load_w0_word_u1_p0_reg__le

Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__le   arm_instr_store_w0_byte_u1_p0_reg__le

Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__le   arm_instr_load_w0_byte_u1_p0_reg__le

Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1346 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ls   arm_instr_store_w0_word_u1_p0_imm__ls

Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ls   arm_instr_load_w0_word_u1_p0_imm__ls

Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ls   arm_instr_store_w0_byte_u1_p0_imm__ls

Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ls   arm_instr_load_w0_byte_u1_p0_imm__ls

Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ls   arm_instr_store_w0_word_u1_p0_reg__ls

Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ls   arm_instr_load_w0_word_u1_p0_reg__ls

Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ls   arm_instr_store_w0_byte_u1_p0_reg__ls

Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ls   arm_instr_load_w0_byte_u1_p0_reg__ls

Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1342 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__lt   arm_instr_store_w0_word_u1_p0_imm__lt

Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__lt   arm_instr_load_w0_word_u1_p0_imm__lt

Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__lt   arm_instr_store_w0_byte_u1_p0_imm__lt

Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__lt   arm_instr_load_w0_byte_u1_p0_imm__lt

Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__lt   arm_instr_store_w0_word_u1_p0_reg__lt

Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__lt   arm_instr_load_w0_word_u1_p0_reg__lt

Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__lt   arm_instr_store_w0_byte_u1_p0_reg__lt

Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__lt   arm_instr_load_w0_byte_u1_p0_reg__lt

Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1344 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__mi [1/20]

#define A__NAME__mi   arm_instr_store_w0_word_u1_p0_imm__mi

Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__mi   arm_instr_load_w0_word_u1_p0_imm__mi

Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__mi   arm_instr_store_w0_byte_u1_p0_imm__mi

Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__mi   arm_instr_load_w0_byte_u1_p0_imm__mi

Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__mi   arm_instr_store_w0_word_u1_p0_reg__mi

Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__mi   arm_instr_load_w0_word_u1_p0_reg__mi

Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__mi   arm_instr_store_w0_byte_u1_p0_reg__mi

Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__mi   arm_instr_load_w0_byte_u1_p0_reg__mi

Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1337 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ne   arm_instr_store_w0_word_u1_p0_imm__ne

Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ne   arm_instr_load_w0_word_u1_p0_imm__ne

Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ne   arm_instr_store_w0_byte_u1_p0_imm__ne

Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ne   arm_instr_load_w0_byte_u1_p0_imm__ne

Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ne   arm_instr_store_w0_word_u1_p0_reg__ne

Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ne   arm_instr_load_w0_word_u1_p0_reg__ne

Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ne   arm_instr_store_w0_byte_u1_p0_reg__ne

Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__ne   arm_instr_load_w0_byte_u1_p0_reg__ne

Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1334 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__pl   arm_instr_store_w0_word_u1_p0_imm__pl

Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__pl   arm_instr_load_w0_word_u1_p0_imm__pl

Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__pl   arm_instr_store_w0_byte_u1_p0_imm__pl

Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__pl   arm_instr_load_w0_byte_u1_p0_imm__pl

Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__pl   arm_instr_store_w0_word_u1_p0_reg__pl

Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__pl   arm_instr_load_w0_word_u1_p0_reg__pl

Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__pl   arm_instr_store_w0_byte_u1_p0_reg__pl

Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__pl   arm_instr_load_w0_byte_u1_p0_reg__pl

Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1338 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME__vc [1/20]

#define A__NAME__vc   arm_instr_store_w0_word_u1_p0_imm__vc

Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vc   arm_instr_load_w0_word_u1_p0_imm__vc

Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vc   arm_instr_store_w0_byte_u1_p0_imm__vc

Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vc   arm_instr_load_w0_byte_u1_p0_imm__vc

Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vc   arm_instr_store_w0_word_u1_p0_reg__vc

Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vc   arm_instr_load_w0_word_u1_p0_reg__vc

Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vc   arm_instr_store_w0_byte_u1_p0_reg__vc

Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vc   arm_instr_load_w0_byte_u1_p0_reg__vc

Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1340 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vs   arm_instr_store_w0_word_u1_p0_imm__vs

Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vs   arm_instr_load_w0_word_u1_p0_imm__vs

Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vs   arm_instr_store_w0_byte_u1_p0_imm__vs

Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vs   arm_instr_load_w0_byte_u1_p0_imm__vs

Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vs   arm_instr_store_w0_word_u1_p0_reg__vs

Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vs   arm_instr_load_w0_word_u1_p0_reg__vs

Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vs   arm_instr_store_w0_byte_u1_p0_reg__vs

Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME__vs   arm_instr_load_w0_byte_u1_p0_reg__vs

Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1339 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC   arm_instr_store_w0_word_u1_p0_imm_pc

Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC   arm_instr_load_w0_word_u1_p0_imm_pc

Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC   arm_instr_store_w0_byte_u1_p0_imm_pc

Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC   arm_instr_load_w0_byte_u1_p0_imm_pc

Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC   arm_instr_store_w0_word_u1_p0_reg_pc

Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC   arm_instr_load_w0_word_u1_p0_reg_pc

Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC   arm_instr_store_w0_byte_u1_p0_reg_pc

Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC   arm_instr_load_w0_byte_u1_p0_reg_pc

Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC [16/20]

Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC [17/20]

Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC [20/20]

Definition at line 1347 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__cc   arm_instr_store_w0_word_u1_p0_imm_pc__cc

Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__cc   arm_instr_load_w0_word_u1_p0_imm_pc__cc

Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__cc   arm_instr_store_w0_byte_u1_p0_imm_pc__cc

Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__cc   arm_instr_load_w0_byte_u1_p0_imm_pc__cc

Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cc [5/20]

#define A__NAME_PC__cc   arm_instr_store_w0_word_u1_p0_reg_pc__cc

Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__cc   arm_instr_load_w0_word_u1_p0_reg_pc__cc

Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__cc   arm_instr_store_w0_byte_u1_p0_reg_pc__cc

Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__cc   arm_instr_load_w0_byte_u1_p0_reg_pc__cc

Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cc [14/20]

Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1351 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [1/20]

#define A__NAME_PC__cs   arm_instr_store_w0_word_u1_p0_imm_pc__cs

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__cs   arm_instr_load_w0_word_u1_p0_imm_pc__cs

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [3/20]

#define A__NAME_PC__cs   arm_instr_store_w0_byte_u1_p0_imm_pc__cs

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [4/20]

#define A__NAME_PC__cs   arm_instr_load_w0_byte_u1_p0_imm_pc__cs

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [5/20]

#define A__NAME_PC__cs   arm_instr_store_w0_word_u1_p0_reg_pc__cs

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [6/20]

#define A__NAME_PC__cs   arm_instr_load_w0_word_u1_p0_reg_pc__cs

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [7/20]

#define A__NAME_PC__cs   arm_instr_store_w0_byte_u1_p0_reg_pc__cs

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [8/20]

#define A__NAME_PC__cs   arm_instr_load_w0_byte_u1_p0_reg_pc__cs

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [11/20]

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [12/20]

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [13/20]

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [14/20]

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [15/20]

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [16/20]

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [17/20]

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [18/20]

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [19/20]

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__cs [20/20]

Definition at line 1350 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__eq [1/20]

#define A__NAME_PC__eq   arm_instr_store_w0_word_u1_p0_imm_pc__eq

Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__eq [2/20]

#define A__NAME_PC__eq   arm_instr_load_w0_word_u1_p0_imm_pc__eq

Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__eq [3/20]

#define A__NAME_PC__eq   arm_instr_store_w0_byte_u1_p0_imm_pc__eq

Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__eq [4/20]

#define A__NAME_PC__eq   arm_instr_load_w0_byte_u1_p0_imm_pc__eq

Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__eq [5/20]

#define A__NAME_PC__eq   arm_instr_store_w0_word_u1_p0_reg_pc__eq

Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__eq [6/20]

#define A__NAME_PC__eq   arm_instr_load_w0_word_u1_p0_reg_pc__eq

Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__eq [7/20]

#define A__NAME_PC__eq   arm_instr_store_w0_byte_u1_p0_reg_pc__eq

Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__eq [8/20]

#define A__NAME_PC__eq   arm_instr_load_w0_byte_u1_p0_reg_pc__eq

Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__eq [20/20]

Definition at line 1348 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [1/20]

#define A__NAME_PC__ge   arm_instr_store_w0_word_u1_p0_imm_pc__ge

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [2/20]

#define A__NAME_PC__ge   arm_instr_load_w0_word_u1_p0_imm_pc__ge

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [3/20]

#define A__NAME_PC__ge   arm_instr_store_w0_byte_u1_p0_imm_pc__ge

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [4/20]

#define A__NAME_PC__ge   arm_instr_load_w0_byte_u1_p0_imm_pc__ge

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [5/20]

#define A__NAME_PC__ge   arm_instr_store_w0_word_u1_p0_reg_pc__ge

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [6/20]

#define A__NAME_PC__ge   arm_instr_load_w0_word_u1_p0_reg_pc__ge

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [7/20]

#define A__NAME_PC__ge   arm_instr_store_w0_byte_u1_p0_reg_pc__ge

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [8/20]

#define A__NAME_PC__ge   arm_instr_load_w0_byte_u1_p0_reg_pc__ge

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [9/20]

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [10/20]

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [14/20]

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [15/20]

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [17/20]

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [18/20]

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [19/20]

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ge [20/20]

Definition at line 1358 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__gt [1/20]

#define A__NAME_PC__gt   arm_instr_store_w0_word_u1_p0_imm_pc__gt

Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__gt [2/20]

#define A__NAME_PC__gt   arm_instr_load_w0_word_u1_p0_imm_pc__gt

Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__gt [3/20]

#define A__NAME_PC__gt   arm_instr_store_w0_byte_u1_p0_imm_pc__gt

Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__gt [4/20]

#define A__NAME_PC__gt   arm_instr_load_w0_byte_u1_p0_imm_pc__gt

Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__gt [5/20]

#define A__NAME_PC__gt   arm_instr_store_w0_word_u1_p0_reg_pc__gt

Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__gt [6/20]

#define A__NAME_PC__gt   arm_instr_load_w0_word_u1_p0_reg_pc__gt

Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__gt [7/20]

#define A__NAME_PC__gt   arm_instr_store_w0_byte_u1_p0_reg_pc__gt

Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__gt [8/20]

#define A__NAME_PC__gt   arm_instr_load_w0_byte_u1_p0_reg_pc__gt

Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__gt [9/20]

Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__gt [11/20]

Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1360 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__hi   arm_instr_store_w0_word_u1_p0_imm_pc__hi

Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__hi   arm_instr_load_w0_word_u1_p0_imm_pc__hi

Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__hi   arm_instr_store_w0_byte_u1_p0_imm_pc__hi

Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__hi   arm_instr_load_w0_byte_u1_p0_imm_pc__hi

Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__hi   arm_instr_store_w0_word_u1_p0_reg_pc__hi

Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__hi   arm_instr_load_w0_word_u1_p0_reg_pc__hi

Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__hi   arm_instr_store_w0_byte_u1_p0_reg_pc__hi

Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__hi   arm_instr_load_w0_byte_u1_p0_reg_pc__hi

Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1356 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__le   arm_instr_store_w0_word_u1_p0_imm_pc__le

Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__le   arm_instr_load_w0_word_u1_p0_imm_pc__le

Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__le   arm_instr_store_w0_byte_u1_p0_imm_pc__le

Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__le   arm_instr_load_w0_byte_u1_p0_imm_pc__le

Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__le   arm_instr_store_w0_word_u1_p0_reg_pc__le

Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__le   arm_instr_load_w0_word_u1_p0_reg_pc__le

Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__le   arm_instr_store_w0_byte_u1_p0_reg_pc__le

Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__le   arm_instr_load_w0_byte_u1_p0_reg_pc__le

Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1361 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__ls   arm_instr_store_w0_word_u1_p0_imm_pc__ls

Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__ls   arm_instr_load_w0_word_u1_p0_imm_pc__ls

Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__ls   arm_instr_store_w0_byte_u1_p0_imm_pc__ls

Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ls [4/20]

#define A__NAME_PC__ls   arm_instr_load_w0_byte_u1_p0_imm_pc__ls

Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ls [5/20]

#define A__NAME_PC__ls   arm_instr_store_w0_word_u1_p0_reg_pc__ls

Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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#define A__NAME_PC__ls   arm_instr_load_w0_word_u1_p0_reg_pc__ls

Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ls [7/20]

#define A__NAME_PC__ls   arm_instr_store_w0_byte_u1_p0_reg_pc__ls

Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ls [8/20]

#define A__NAME_PC__ls   arm_instr_load_w0_byte_u1_p0_reg_pc__ls

Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1357 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [1/20]

#define A__NAME_PC__lt   arm_instr_store_w0_word_u1_p0_imm_pc__lt

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [2/20]

#define A__NAME_PC__lt   arm_instr_load_w0_word_u1_p0_imm_pc__lt

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [3/20]

#define A__NAME_PC__lt   arm_instr_store_w0_byte_u1_p0_imm_pc__lt

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [4/20]

#define A__NAME_PC__lt   arm_instr_load_w0_byte_u1_p0_imm_pc__lt

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [5/20]

#define A__NAME_PC__lt   arm_instr_store_w0_word_u1_p0_reg_pc__lt

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [6/20]

#define A__NAME_PC__lt   arm_instr_load_w0_word_u1_p0_reg_pc__lt

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [7/20]

#define A__NAME_PC__lt   arm_instr_store_w0_byte_u1_p0_reg_pc__lt

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [8/20]

#define A__NAME_PC__lt   arm_instr_load_w0_byte_u1_p0_reg_pc__lt

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [9/20]

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [11/20]

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [12/20]

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [13/20]

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [14/20]

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [15/20]

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [16/20]

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [17/20]

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [18/20]

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [19/20]

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__lt [20/20]

Definition at line 1359 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [1/20]

#define A__NAME_PC__mi   arm_instr_store_w0_word_u1_p0_imm_pc__mi

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [2/20]

#define A__NAME_PC__mi   arm_instr_load_w0_word_u1_p0_imm_pc__mi

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [3/20]

#define A__NAME_PC__mi   arm_instr_store_w0_byte_u1_p0_imm_pc__mi

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [4/20]

#define A__NAME_PC__mi   arm_instr_load_w0_byte_u1_p0_imm_pc__mi

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [5/20]

#define A__NAME_PC__mi   arm_instr_store_w0_word_u1_p0_reg_pc__mi

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [6/20]

#define A__NAME_PC__mi   arm_instr_load_w0_word_u1_p0_reg_pc__mi

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [7/20]

#define A__NAME_PC__mi   arm_instr_store_w0_byte_u1_p0_reg_pc__mi

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [8/20]

#define A__NAME_PC__mi   arm_instr_load_w0_byte_u1_p0_reg_pc__mi

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [9/20]

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [10/20]

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [11/20]

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [12/20]

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [13/20]

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [14/20]

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [15/20]

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [16/20]

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [17/20]

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [18/20]

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [19/20]

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__mi [20/20]

Definition at line 1352 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [1/20]

#define A__NAME_PC__ne   arm_instr_store_w0_word_u1_p0_imm_pc__ne

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [2/20]

#define A__NAME_PC__ne   arm_instr_load_w0_word_u1_p0_imm_pc__ne

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [3/20]

#define A__NAME_PC__ne   arm_instr_store_w0_byte_u1_p0_imm_pc__ne

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [4/20]

#define A__NAME_PC__ne   arm_instr_load_w0_byte_u1_p0_imm_pc__ne

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [5/20]

#define A__NAME_PC__ne   arm_instr_store_w0_word_u1_p0_reg_pc__ne

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [6/20]

#define A__NAME_PC__ne   arm_instr_load_w0_word_u1_p0_reg_pc__ne

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [7/20]

#define A__NAME_PC__ne   arm_instr_store_w0_byte_u1_p0_reg_pc__ne

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [8/20]

#define A__NAME_PC__ne   arm_instr_load_w0_byte_u1_p0_reg_pc__ne

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [9/20]

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [10/20]

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [11/20]

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [12/20]

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [13/20]

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [14/20]

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [15/20]

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [16/20]

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [17/20]

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [18/20]

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [19/20]

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__ne [20/20]

Definition at line 1349 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [1/20]

#define A__NAME_PC__pl   arm_instr_store_w0_word_u1_p0_imm_pc__pl

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [2/20]

#define A__NAME_PC__pl   arm_instr_load_w0_word_u1_p0_imm_pc__pl

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [3/20]

#define A__NAME_PC__pl   arm_instr_store_w0_byte_u1_p0_imm_pc__pl

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [4/20]

#define A__NAME_PC__pl   arm_instr_load_w0_byte_u1_p0_imm_pc__pl

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [5/20]

#define A__NAME_PC__pl   arm_instr_store_w0_word_u1_p0_reg_pc__pl

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [6/20]

#define A__NAME_PC__pl   arm_instr_load_w0_word_u1_p0_reg_pc__pl

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [7/20]

#define A__NAME_PC__pl   arm_instr_store_w0_byte_u1_p0_reg_pc__pl

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [8/20]

#define A__NAME_PC__pl   arm_instr_load_w0_byte_u1_p0_reg_pc__pl

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [9/20]

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [10/20]

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [11/20]

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [12/20]

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__pl [20/20]

Definition at line 1353 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vc [1/20]

#define A__NAME_PC__vc   arm_instr_store_w0_word_u1_p0_imm_pc__vc

Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vc [2/20]

#define A__NAME_PC__vc   arm_instr_load_w0_word_u1_p0_imm_pc__vc

Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vc [3/20]

#define A__NAME_PC__vc   arm_instr_store_w0_byte_u1_p0_imm_pc__vc

Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vc [4/20]

#define A__NAME_PC__vc   arm_instr_load_w0_byte_u1_p0_imm_pc__vc

Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vc [5/20]

#define A__NAME_PC__vc   arm_instr_store_w0_word_u1_p0_reg_pc__vc

Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vc [6/20]

#define A__NAME_PC__vc   arm_instr_load_w0_word_u1_p0_reg_pc__vc

Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vc [7/20]

#define A__NAME_PC__vc   arm_instr_store_w0_byte_u1_p0_reg_pc__vc

Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vc [8/20]

#define A__NAME_PC__vc   arm_instr_load_w0_byte_u1_p0_reg_pc__vc

Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vc [9/20]

Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vc [20/20]

Definition at line 1355 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [1/20]

#define A__NAME_PC__vs   arm_instr_store_w0_word_u1_p0_imm_pc__vs

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [2/20]

#define A__NAME_PC__vs   arm_instr_load_w0_word_u1_p0_imm_pc__vs

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [3/20]

#define A__NAME_PC__vs   arm_instr_store_w0_byte_u1_p0_imm_pc__vs

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [4/20]

#define A__NAME_PC__vs   arm_instr_load_w0_byte_u1_p0_imm_pc__vs

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [5/20]

#define A__NAME_PC__vs   arm_instr_store_w0_word_u1_p0_reg_pc__vs

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [6/20]

#define A__NAME_PC__vs   arm_instr_load_w0_word_u1_p0_reg_pc__vs

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [7/20]

#define A__NAME_PC__vs   arm_instr_store_w0_byte_u1_p0_reg_pc__vs

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [8/20]

#define A__NAME_PC__vs   arm_instr_load_w0_byte_u1_p0_reg_pc__vs

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [9/20]

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

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Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [13/20]

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [14/20]

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [15/20]

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [16/20]

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [17/20]

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [18/20]

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [19/20]

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__NAME_PC__vs [20/20]

Definition at line 1354 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__REG [1/10]

#define A__REG

Definition at line 1366 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__REG [2/10]

#define A__REG

Definition at line 1366 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__REG [3/10]

#define A__REG

Definition at line 1366 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__REG [4/10]

#define A__REG

Definition at line 1366 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__REG [5/10]

#define A__REG

Definition at line 1366 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__REG [6/10]

#define A__REG

Definition at line 1366 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__REG [7/10]

#define A__REG

Definition at line 1366 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__REG [8/10]

#define A__REG

Definition at line 1366 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__REG [9/10]

#define A__REG

Definition at line 1366 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__REG [10/10]

#define A__REG

Definition at line 1366 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__SIGNED [1/8]

#define A__SIGNED

Definition at line 1362 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__SIGNED [2/8]

#define A__SIGNED

Definition at line 1362 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__SIGNED [3/8]

#define A__SIGNED

Definition at line 1362 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__SIGNED [4/8]

#define A__SIGNED

Definition at line 1362 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__SIGNED [5/8]

#define A__SIGNED

Definition at line 1362 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__SIGNED [6/8]

#define A__SIGNED

Definition at line 1362 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__SIGNED [7/8]

#define A__SIGNED

Definition at line 1362 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__SIGNED [8/8]

#define A__SIGNED

Definition at line 1362 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [1/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

Referenced by A__NAME__general().

◆ A__U [2/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [3/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [4/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [5/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [6/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [7/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [8/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [9/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [10/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [11/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [12/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [13/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [14/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [15/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [16/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [17/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [18/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [19/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ A__U [20/20]

#define A__U

Definition at line 1365 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ DYNTRANS_PC_TO_POINTERS

#define DYNTRANS_PC_TO_POINTERS   arm_pc_to_pointers

Definition at line 10 of file tmp_arm_loadstore_p0_u1_w0.cc.

◆ reg

#define reg (   x)    (*((uint32_t *)(x)))

Definition at line 12 of file tmp_arm_loadstore_p0_u1_w0.cc.

Function Documentation

◆ arm_instr_invalid()

void arm_instr_invalid ( struct cpu ,
struct arm_instr_call *   
)

◆ arm_instr_nop()

void arm_instr_nop ( struct cpu ,
struct arm_instr_call *   
)

◆ arm_pc_to_pointers()

void arm_pc_to_pointers ( struct cpu )

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