sh4_rtcreg.h Source File

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sh4_rtcreg.h
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1 /* $NetBSD: rtcreg.h,v 1.9 2006/03/04 01:55:03 uwe Exp $ */
2 
3 #ifndef SH4_RTCREG_H
4 #define SH4_RTCREG_H
5 
6 /*-
7  * Copyright (C) 1999 SAITOH Masanobu. All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  * notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  * notice, this list of conditions and the following disclaimer in the
16  * documentation and/or other materials provided with the distribution.
17  * 3. The name of the author may not be used to endorse or promote products
18  * derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /* #include <sh3/devreg.h> */
33 
34 /*
35  * RTC
36  */
37 #define SH3_R64CNT 0xfffffec0
38 #define SH3_RSECCNT 0xfffffec2
39 #define SH3_RMINCNT 0xfffffec4
40 #define SH3_RHRCNT 0xfffffec6
41 #define SH3_RWKCNT 0xfffffec8
42 #define SH3_RDAYCNT 0xfffffeca
43 #define SH3_RMONCNT 0xfffffecc
44 #define SH3_RYRCNT 0xfffffece
45 #define SH3_RSECAR 0xfffffed0
46 #define SH3_RMINAR 0xfffffed2
47 #define SH3_RHRAR 0xfffffed4
48 #define SH3_RWKAR 0xfffffed6
49 #define SH3_RDAYAR 0xfffffed8
50 #define SH3_RMONAR 0xfffffeda
51 #define SH3_RCR1 0xfffffedc
52 #define SH3_RCR2 0xfffffede
53 
54 #define SH4_R64CNT 0xffc80000
55 #define SH4_RSECCNT 0xffc80004
56 #define SH4_RMINCNT 0xffc80008
57 #define SH4_RHRCNT 0xffc8000c
58 #define SH4_RWKCNT 0xffc80010
59 #define SH4_RDAYCNT 0xffc80014
60 #define SH4_RMONCNT 0xffc80018
61 #define SH4_RYRCNT 0xffc8001c /* 16 bit */
62 #define SH4_RSECAR 0xffc80020
63 #define SH4_RMINAR 0xffc80024
64 #define SH4_RHRAR 0xffc80028
65 #define SH4_RWKAR 0xffc8002c
66 #define SH4_RDAYAR 0xffc80030
67 #define SH4_RMONAR 0xffc80034
68 #define SH4_RCR1 0xffc80038
69 #define SH4_RCR2 0xffc8003c
70 
71 #define SH_RCR1_CF 0x80
72 #define SH_RCR1_CIE 0x10
73 #define SH_RCR1_AIE 0x08
74 #define SH_RCR1_AF 0x01
75 #define SH_RCR2_PEF 0x80
76 #define SH_RCR2_PES2 0x40
77 #define SH_RCR2_PES1 0x20
78 #define SH_RCR2_PES0 0x10
79 #define SH_RCR2_ENABLE 0x08
80 #define SH_RCR2_ADJ 0x04
81 #define SH_RCR2_RESET 0x02
82 #define SH_RCR2_START 0x01
83 
84 #ifndef _LOCORE
85 #if defined(SH3) && defined(SH4)
86 extern uint32_t __sh_R64CNT;
87 extern uint32_t __sh_RSECCNT;
88 extern uint32_t __sh_RMINCNT;
89 extern uint32_t __sh_RHRCNT;
90 extern uint32_t __sh_RWKCNT;
91 extern uint32_t __sh_RDAYCNT;
92 extern uint32_t __sh_RMONCNT;
93 extern uint32_t __sh_RYRCNT;
94 extern uint32_t __sh_RSECAR;
95 extern uint32_t __sh_RMINAR;
96 extern uint32_t __sh_RHRAR;
97 extern uint32_t __sh_RWKAR;
98 extern uint32_t __sh_RDAYAR;
99 extern uint32_t __sh_RMONAR;
100 extern uint32_t __sh_RCR1;
101 extern uint32_t __sh_RCR2;
102 #endif /* SH3 && SH4 */
103 #endif /* !_LOCORE */
104 
105 #endif /* SH4_RTCREG_H */

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